ICS1893AF Data Sheet - Release
Chapter 9 Pin Diagram, Listings, and Descriptions
9.2.4 MAC Interface Pins
This section lists pin descriptions for each of the following interfaces
• Section 9.2.4.1, “MAC Interface Pins for Media Independent Interface”
9.2.4.1 MAC Interface Pins for Media Independent Interface
Table 9-8 lists the MAC/Repeater Interface pin descriptions for the MII.
Table 9-8. MAC/Repeater Interface Pins: Media Independent Interface (MII)
Pin
Pin
Pin
Pin Description
Name Number
Type
COL
43
Output Collision (Detect).
The ICS1893AF asserts a signal on the COL pin when the ICS1893AF
detects receive activity while transmitting (that is, while the TXEN signal is
asserted by the MAC/repeater, that is, when transmitting). When the
mode is:
• 10Base-T, the ICS1893AF detects receive activity by monitoring the
un-squelched MDI receive signal.
• 100Base-TX, the ICS1893AF detects receive activity when there are
two non-contiguous zeros in any 10-bit symbol derived from the MDI
receive data stream.
Note:
1. The signal on the COL pin is not synchronous to either RXCLK or
TXCLK.
2. In full-duplex mode, the COL signal is disabled and always remains
low.
3. The COL signal is asserted as part of the signal quality error (SQE)
test. This assertion can be suppressed with the SQE Test Inhibit bit (bit
18.2).
CRS
MDC
44
27
Output Carrier Sense.
When the ICS1893AF mode is:
• Half-duplex, the ICS1893AF asserts a signal on its CRS pin when it
detects either receive or transmit activity.
• Either full-duplex or Repeater mode, the ICS1893AF asserts a signal
on its CRS pin only in response to receive activity.
Note: The signal on the CRS pin is not synchronous to the signal on
either the RXCLK or TXCLK pin.
Input
Management Data Clock.
The ICS1893AF uses the signal on the MDC pin to synchronize the
transfer of management information between the ICS1893AF and the
Station Management Entity (STA), using the serial MDIO data line. The
MDC signal is sourced by the STA.
ICS1893AF, Rev. D 10/26/04
October, 2004
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
105
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
