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1892Y-14 参数 Datasheet PDF下载

1892Y-14图片预览
型号: 1892Y-14
PDF下载: 下载PDF文件 查看货源
内容描述: [Ethernet Transceiver, 1-Trnsvr, CMOS, PQFP64]
分类和应用: 以太网:16GBASE-T电信电信集成电路
文件页数/大小: 148 页 / 1762 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS1892  
10Base-T/100Base-TX Integrated PHYceiver™  
TSD  
8.8 Register 6: Auto-Negotiation Expansion Register  
Table 8-13 lists the bits for the Auto-Negotiation Expansion Register, which indicates the status of the  
Auto-Negotiation process.  
Note: For an explanation of acronyms used in Table 8-13, see Chapter 1, “Abbreviations and Acronyms”.  
Table 8-13. Auto-Negotiation Expansion Register (register 6 [0x06])  
Bit  
Definition  
When Bit = 0  
When Bit = 1  
Ac- SF De- Hex  
cess  
CW  
CW  
CW  
CW  
CW  
CW  
CW  
CW  
CW  
CW  
CW  
fault  
0†  
0†  
0†  
0†  
0†  
0†  
0†  
0†  
0†  
0†  
0†  
0
6.15 IEEE reserved  
6.14 IEEE reserved  
6.13 IEEE reserved  
6.12 IEEE reserved  
6.11 IEEE reserved  
6.10 IEEE reserved  
Always 0  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
0
0
0
Always 0  
Always 0  
Always 0  
Always 0  
Always 0  
Always 0  
Always 0  
Always 0  
Always 0  
Always 0  
No Fault  
6.9  
6.8  
6.7  
6.6  
6.5  
6.4  
IEEE reserved  
IEEE reserved  
IEEE reserved  
IEEE reserved  
IEEE reserved  
Parallel detection fault  
Multiple technologies  
detected  
RO LH  
6.3  
6.2  
Link partner Next Page  
able  
Link partner is not Next  
Page able  
Link partner is Next Page  
able  
RO  
RO  
0
1
4
Next Page able  
Local device is not Next  
Page able  
Local device is Next Page  
able  
6.1  
6.0  
Page received  
Next Page not received  
Next Page received  
RO LH  
RO  
0
0
Link partner  
Link partner is not  
Link partner is  
Auto-Negotiation able  
Auto-Negotiation able  
Auto-Negotiation able  
† As per the IEEE Std 802.3u, during any write operation to any bit in this register, the STA must write the default value  
to all Reserved bits.  
8.8.1 IEEE Reserved Bits (bits 6.15:5)  
The ISO/IEC specification reserves these bits for future use. When an STA:  
Reads a reserved bit, the ICS1892 returns a logic zero.  
Writes to a reserved bit, the STA must use the default value specified in this data sheet.  
ICS uses some of these reserved bits to invoke auxiliary functions. To ensure proper operation of the  
ICS1892, an STA must maintain the default value of these bits. Therefore, ICS recommends that an STA  
always write the default value of any reserved bits during all management register write operations.  
Reserved bits 5.15:5 are Command Override Write (CW) bits. When the Command Register Override bit  
(bit 16.15) is logic:  
Zero, the ICS1892 isolates all STA writes to CW bits.  
One, an STA can modify the value of these bits  
IDT™ / ICS™ 10Base-T/100Base-TX Integrated PHYceiver™  
ICS1892  
80  
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