ICS1892
TSD
Chapter 10 DC and AC Operating Conditions
10Base-T/100BIaCseS-TX1I8nt9eg2rated PHYceiver™
10.5.21 Auto-Negotiation Fast Link Pulse Timing
Table 10-28 lists the significant time periods for the ICS1892 Auto-Negotiation Fast Link Pulse (which
consists of timings of signals on the TP_TXP and TP_TXN pins). Figure 10-21 shows the timing diagram
for the time periods.
Table 10-28. Auto-Negotiation Fast Link Pulse Timing
Time
Parameter
Conditions
Min.
Typ.
Max.
Units
Period
t1
t2
t3
t4
t5
t6
Clock/Data Pulse Width
–
–
–
–
–
–
–
55.5
111
–
100
62.5
125
2
–
69.5
139
–
ns
µs
Clock Pulse-to-Data Pulse Timing
Clock Pulse-to-Clock Pulse Timing
FLP Burst Width
µs
ms
FLP Burst to FLP Burst
8
16.8
–
24
ms
Number of Clock/Data Pulses in a Burst
17
33
pulses
Figure 10-21. Auto-Negotiation Fast Link Pulse Timing Diagram
Clock
Pulse
Data
Pulse
Clock
Pulse
TP_TXP
t1
t1
t3
t2
FLP Burst
FLP Burst
TP_TXP
t4
t5
ICS1892, Rev. D, 2/26/01
February 26, 2001
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
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IDT™ / ICS™ 10Base-T/100Base-TX Integrated PHYceiver™
ICS1892
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