ICS1524A
Name: Oscillator Divider Register
Register: 7h
Index: Read/Write
Bit Name
Bit # Reset Value Description
Osc_Div 0-6
In_Sel
0-6
7
0
1
Osc Divider Modulus
Input Select
Bit
Name
Description
0-6
Osc_Div 0-6
Oscillator Divider Modulus.
Divides the input from OSC (pin 12) by the set modulus.
The modulus equals the programmed value, plus 2.
Therefore, the modulus range is from 3 to 129.
7
In_Sel
Input Select — Selects the input to the Phase/Frequency Detector
0 = HSYNC
1 = Osc Divider
Name: RESET Register
Register: 8h
Index: Write
Bit Name
Bit # Reset Value Description
DPA Reset
PLL Reset
0-3
4-7
x
x
Writing xAh to this register resets DPA working register 5
Writing 5xh to this register resets PLL working registers 1-3
Bit
Name
Description
0 -3
4-7
DPA
PLL
Writing xAh to this register resets DPA working register 5
Writing 5xh to this register resets PLL working registers 1-3
Value
xA
Resets
DPA
5x
PLL
5A
DPA and PLL
ICS1524A Rev D 12/23/2005
11
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
