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IC41LV16105S-50T 参数 Datasheet PDF下载

IC41LV16105S-50T图片预览
型号: IC41LV16105S-50T
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16 ( 16兆位)动态RAM具有快速页面模式 [1M x 16 (16-MBIT) DYNAMIC RAM WITH FAST PAGE MODE]
分类和应用: 存储内存集成电路光电二极管动态存储器
文件页数/大小: 18 页 / 199 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IC41C16105S  
IC41LV16105S  
AC CHARACTERISTICS (Continued)(1,2,3,4,5,6)  
(Recommended Operating Conditions unless otherwise noted.)  
-50  
Min. Max.  
-60  
Min. Max.  
Symbol  
Parameter  
Units  
tACH  
Column-Address Setup Time to CAS  
Precharge during WRITE Cycle  
15  
—
15  
—
ns  
tOEH  
OE Hold Time from WE during  
READ-MODI<Y-WRITE cycle(18)  
8
—
10  
—
ns  
tDS  
Data-In Setup Time(15, 22)  
Data-In Hold Time(15, 22)  
0
8
—
—
—
—
0
—
—
—
—
ns  
ns  
ns  
ns  
tDH  
10  
tRWC  
tRWD  
READ-MODI<Y-WRITE Cycle Time  
108  
64  
133  
77  
RAS to WE Delay Time during  
READ-MODI<Y-WRITE Cycle(14)  
tCWD  
tAWD  
tPC  
CAS to WE Delay Time(14, 20)  
Column-Address to WE Delay Time(14)  
26  
39  
20  
—
—
—
32  
47  
25  
—
—
—
ns  
ns  
ns  
<ast Page Mode READ or WRITE  
Cycle Time(24)  
tRASP  
tCPA  
RAS Pulse Width  
50  
—
56  
5
100K  
30  
60  
—
68  
5
100K  
35  
ns  
ns  
ns  
ns  
Access Time from CAS Precharge(15)  
READ-WRITE Cycle Time(24)  
Data Output Hold after CAS LOW  
tPRWC  
tCOH  
tOꢀꢀ  
—
—
—
—
Output  
CAS or RAS(13,15,19, 29)  
Buffer  
Turn-Off  
Delay  
from  
1.6  
121  
tWHZ  
Output Disable Delay from WE  
3
10  
—
3
10  
—
ns  
ns  
tCLCH  
Last CAS going LOW to <irst CAS  
returning HIGH(23)  
10  
10  
tCSR  
tCHR  
tORD  
CAS Setup Time (CBR RE<RESH)(30, 20)  
CAS Hold Time (CBR RE<RESH)(30, 21)  
5
8
0
—
—
—
5
10  
0
—
—
—
ns  
ns  
ns  
OE Setup Time prior to RAS during  
HIDDEN RE<RESH Cycle  
tREꢀ  
tT  
Auto Refresh Period (1,024 Cycles)  
Transition Time (Rise or <all)(2, 3)  
—
1
16  
50  
—
1
16  
50  
ms  
ns  
AC TEST CONDITIONS  
Output load:  
Two TTL Loads and 50 p< (Vcc = 5.0V ±10%)  
One TTL Load and 50 p< (Vcc = 3.3V ±10%)  
Input timing reference levels: VIH = 2.4V, VIL = 0.8V (Vcc = 5.0V ±10%);  
VIH = 2.0V, VIL = 0.8V (Vcc = 3.3V ±10%)  
Output timing reference levels: VOH = 2.0V, VOL = 0.8V (Vcc = 5V ±10%, 3.3V ±10%)  
8
Integrated Circuit Solution Inc.  
DR011-0A 05/23/2001