IC41C8513 and IC41LV8513
AC CHARACTERISTICS (Continued)(1,2,3,4,5,6)
(Recommended Operating Conditions unless otherwise noted.)
-35
-50
-60
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Units
tACH
Column-Address Setup Time to CAS
15
8
−
−
15
10
−
−
15
15
−
−
ns
ns
Precharge during WRITE Cycle
tOEH
OE Hold Time from WE during
READ-MODIFY-WRITE cycle(18)
tDS
Data-In Setup Time(15, 22)
Data-In Hold Time(15, 22)
0
6
−
−
−
−
0
8
−
−
−
−
0
−
−
−
−
ns
ns
ns
ns
tDH
10
tRWC
tRWD
READ-MODIFY-WRITE Cycle Time
80
45
125
70
140
80
RAS to WE Delay Time during
READ-MODIFY-WRITE Cycle(14)
tCWD
tAWD
tPC
CAS to WE Delay Time(14, 20)
25
30
12
−
−
−
34
42
20
−
−
−
36
49
25
−
−
−
ns
ns
ns
Column-Address to WE Delay Time(14)
Fast Page Mode READ or WRITE
Cycle Time
tRASP
tCPA
Fast Page Mode RAS Pulse Width
Access Time from CAS Precharge(15)
Fast Page Mode READ-WRITE Cycle Time
Output Buffer Turn-Off Delay from
35
-
100K
21
50
-
100K
27
60
-
100K
34
ns
ns
ns
ns
tPRWC
tOFF
40
3
−
15
47
3
−
15
56
3
−
15
(13,15,19, 24)
CAS or RAS
tCSR
tCHR
tORD
CAS Setup Time (CBR REFRESH)(20, 25)
8
8
0
−
−
−
10
10
0
−
−
−
10
10
0
−
−
−
ns
ns
ns
CAS Hold Time (CBR REFRESH)( 21, 25)
OE Setup Time prior to RAS during
HIDDEN REFRESH Cycle
tREF
tT
Auto Refresh Period 1,024 Cycles
Transition Time (Rise or Fall)(2, 3)
−
1
16
15
−
1
16
50
−
1
16
50
ms
ns
AC TEST CONDITIONS
Output load:
Two TTL Loads and 50 pF (Vcc = 5.0V + 10%)
One TTL Load and 50 pF (Vcc = 3.3V + 10%)
Input timing reference levels:
VIH = 2.4V, VIL = 0.8V (Vcc = 5.0V + 10%)
VIH = 2.4V, VIL = 0.8V (Vcc = 3.3V + 10%)
Output timing reference levels: VOH = 2.0V, VOL = 0.8V (Vcc = 5.0V + 10%, 3.3V + 10%)
8
Integrated Circuit Solution Inc.
DR028-0A 09/25/2001
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
