Integrated
Circuit
Systems, Inc.
ICS952621
Absolute Max
Symbol
VDD_A
VDD_In
Ts
Tambient
Tcase
ESD prot
Parameter
3.3V Core Supply Voltage
3.3V Logic Input Supply Voltage
Storage Temperature
Ambient Operating Temp
Case Temperature
Input ESD protection
human body model
Min
-0.5
-65
0
2000
Max
V
DD +
0.5V
V
DD +
0.5V
150
70
115
Units
V
V
°C
°C
°C
V
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 70°C; Supply Voltage V
DD
= 3.3 V +/-5%
PARAMETER
Input High Voltage
Input Low Voltage
Input High Current
SYMBOL
V
IH
V
IL
I
IH
I
IL1
Input Low Current
I
IL2
Operating Supply Current
Powerdown Current
Input Frequency
3
Pin Inductance
1
1
CONDITIONS
3.3V +/-5%
3.3V +/-5%
V
IN
= V
DD
V
IN
= 0 V; Inputs with no pull-up
resistors
V
IN
= 0 V; Inputs with pull-up
resistors
Full Active, C
L
= Full load;
all diff pairs driven
all differential pairs tri-stated
V
DD
= 3.3 V
MIN
2
V
SS
-
0.3
-5
-5
-200
TYP
MAX
V
DD
+ 0.3
0.8
5
UNITS NOTES
V
V
uA
uA
uA
I
DD3.3OP
I
DD3.3PD
F
i
L
pin
C
IN
C
OUT
C
INX
260
0.3
14.31818
350
35
12
7
5
6
5
mA
mA
mA
MHz
nH
pF
pF
pF
ms
kHz
us
ns
ns
Logic Inputs
Output pin capacitance
Input Capacitance
X1 & X2 pins
From VDD Power-Up or de-
T
STAB
1.8
Clk Stabilization
1,2
assertion of PD# to 1st clock.
Modulation Frequency
Triangular Modulation
30
33
CPU output enable after
Tdrive_PD#
300
PD# de-assertion
Tfall_Pd#
PD# fall time of
5
Trise_Pd#
PD# rise time of
5
1
Guaranteed by design, not 100% tested in production.
2
See timing diagrams for timing requirements.
3
Input frequency should be measured at the REF output pin and tuned to ideal 14.31818MHz to meet
ppm frequency accuracy on PLL outputs.
3
1
1
1
1
1,2
1
1
1
2
0756A—09/10/04
4
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
