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ICS9169CJ-27 参数 Datasheet PDF下载

ICS9169CJ-27图片预览
型号: ICS9169CJ-27
PDF下载: 下载PDF文件 查看货源
内容描述: 频率发生器奔腾™的系统 [Frequency Generator for Pentium™ Based Systems]
分类和应用:
文件页数/大小: 8 页 / 557 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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Integrated  
Circuit  
Systems, Inc.  
ICS9169C-27  
Frequency Generator for Pentium™ Based Systems  
General Description  
Features  
•
•
•
•
Twelve selectable CPU clocks operate up to 83.3MHz  
Maximum CPU jitter of ± 200ps  
Six BUS clocks support sync or async bus operation  
250ps skew window for CPU outputs, 500ps skew  
window for BUS outputs  
CPU clocks BUS clocks skew 1-4ns (CPU early)  
Integrated buffer outputs drive up to 30pF loads  
3.0V - 3.7V supply range, CPU(1:6) outputs 2.5V(2.375-  
2.62V)VDD option  
32-pin SOIC/SOJ package  
The ICS9169C-27 is a low-cost frequency generator  
designed specifically for Pentium based chip set systems.  
The integrated buffer minimizes skew and provides all the  
clocks required. A 14.318 MHz XTAL oscillator provides  
the reference clock to generate standard Pentium  
frequencies. The CPU clock makes gradual frequency  
transitions without violating the PLL timing of internal  
microprocessor clock multipliers.  
•
•
•
Twelve CPU clock outputs provide sufficient clocks for the  
CPU, chip set, memory and up to two DIMM connectors (with  
four clocks to each DIMM). Either synchronous(CPU/2) or  
asynchronous (32 MHz) PCI bus operation can be selected  
by latching data on the BSEL input  
•
•
Logic inputs latched at Power-On for frequency selection  
saving pins as Input/Output  
48 MHz clock for USB support and 24 MHz clock for FD.  
•
Block Diagram  
Pin Configuration  
32-Pin SOIC/SOJ  
Functionality  
3.3V±10%, 0-70°C  
Crystal (X1, X2) = 14.31818 MHz  
ADDRESS  
SELECT  
CPU(1:12)  
(MHz)  
BUS (1:6)MHz  
48MHz 24MHz  
REF  
FS2 FS1 FS0  
BSEL=1 BSEL=0  
VDD Groups:  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
50  
60  
25  
30  
32  
32  
48  
48  
24  
24  
REF  
REF  
REF  
REF  
REF  
REF  
REF  
VDD = X1, X2, REF/BSEL  
VDDC1 = CPU1-6  
VDDC2 = CPU7-12 & PLL Core  
VDDB = BUS1-6  
VDDF = 48/24 MHz  
66.6  
REF/2  
55  
33.3  
REF/4  
27.5  
37.5  
41.7  
32  
48  
24  
REF/3  
32  
REF/2  
48  
REF/4  
24  
Latched Inputs:  
L1 = BSEL  
L2 = FS0  
L3 = FS1  
L4 = FS2  
75  
32  
48  
24  
83.3  
Tristate  
32  
48  
24  
Tristate Tristate Tristate Tristate Tristate  
Pentium is a trademark on Intel Corporation.  
9169C-27 Rev C 04/16/98  
ICS reserves the right to make changes in the device data identified in this publication  
without further notice. ICS advises its customers to obtain the latest version of all  
device data to verify that any information being relied upon by the customer is current  
and accurate.