ICS8302
Integrated
Circuit
Systems, Inc.
LOW
S
KEW, 1-TO-2
LVCMOS / LVTTL FANOUT
BUFFER
TABLE 3C. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V 5ꢀ, VDDO = 2.5V 5ꢀ, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VDD
VDDO
IDD
Core Supply Voltage
3.135
2.375
3.3
2.5
3.465
2.625
13
V
Output Supply Voltage
Power Supply Current
Output Supply Current
V
mA
mA
IDDO
4
TABLE 3D. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V 5ꢀ, VDDO = 2.5V 5ꢀ, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum Units
VIH
VIL
IIH
Input High Voltage
2
VDD + 0.3
1.3
V
V
Input Low Voltage
-0.3
Input High Current CLK
Input Low Current CLK
VDD = VIN = 3.465V
VDD = 3.465V, VIN = 0V
50Ω to VDDO/2
150
µA
µA
V
IIL
-5
1.8
2.2
VOH
VOL
Output High Voltage
Output Low Voltage
IOH = -100µA
V
50Ω to VDDO/2
0.5
0.2
V
I
OL = 100µA
V
TABLE 4B. AC CHARACTERISTICS, VDD = 3.3V 5ꢀ, VDDO = 2.5V 5ꢀ, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
tpLH
tsk(o)
tsk(pp)
tR
Output Frequency
200
3.3
85
MHz
ns
ps
ps
ps
ps
ꢀ
Propagation Delay, Low-to-High; NOTE 1
Output Skew; NOTE 2, 4
Part-to-Part Skew; NOTE 3, 4
Output Rise Time
IJ 200MHz
2.3
250
800
650
650
55
20ꢀ to 80ꢀ
20ꢀ to 80ꢀ
250
250
45
tF
Output Fall Time
IJ 133MHz
odc
Output Duty Cycle
133MHz < IJ 200MHz
40
60
ꢀ
Parameters measured at fMAX unless otherwise noted.
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at VDDO/2.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at VDDO/2.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
8302AM
www.icst.com/products/hiperclocks.html
REV. C JUNE 15, 2004
4