ICS8302
Integrated
Circuit
Systems, Inc.
LOW
S
KEW, 1-TO-2
LVCMOS / LVTTL FANOUT
BUFFER
ABSOLUTE MAXIMUM RATINGS
SupplyVoltage, V
4.6V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only.Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
DD
Inputs, V
-0.5V to VDD + 0.5 V
-0.5V to VDDO + 0.5V
112.7°C/W (0 lfpm)
-65°C to 150°C
I
Outputs, VO
PackageThermal Impedance, θ
JA
StorageTemperature, T
STG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V 5ꢀ, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VDD
VDDO
IDD
Core Supply Voltage
3.135
3.135
3.3
3.3
3.465
3.465
13
V
Output Power Supply Voltage
Power Supply Current
V
mA
mA
IDDO
Output Supply Current
4
TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = VDDO = 3.3V 5ꢀ, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum Units
VIH
VIL
IIH
Input High Voltage
2
VDD + 0.3
1.3
V
V
Input Low Voltage
-0.3
Input High Current CLK
Input Low Current CLK
VDD = VIN = 3.465V
VDD = 3.465V, VIN = 0V
50Ω to VDDO/2
150
µA
µA
V
IIL
-5
2.6
2.9
VOH
VOL
Output High Voltage
Output Low Voltage
IOH = -100µA
V
50Ω to VDDO/2
0.5
0.2
V
IOL = 100µA
V
TABLE 4A. AC CHARACTERISTICS, VDD = VDDO = 3.3V 5ꢀ, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
tpLH
tsk(o)
tsk(pp)
tR
Output Frequency
200
2.8
85
MHz
ns
ps
ps
ps
ps
ꢀ
Propagation Delay, Low-to-High; NOTE 1
Output Skew; NOTE 2, 4
Part-to-Part Skew; NOTE 3, 4
Output Rise Time
IJ 200MHz
1.9
2.35
25
250
800
800
800
55
20ꢀ to 80ꢀ
20ꢀ to 80ꢀ
300
300
45
tF
Output Fall Time
IJ 133MHz
odc
Output Duty Cycle
133MHz < IJ 200MHz
40
60
ꢀ
Parameters measured at fMAX unless otherwise noted.
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
8302AM
www.icst.com/products/hiperclocks.html
REV. C JUNE 15, 2004
3
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
