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ICS1893BYI-10LF 参数 Datasheet PDF下载

ICS1893BYI-10LF图片预览
型号: ICS1893BYI-10LF
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3 -V的10Base -T / 100BASE - TX集成PHYceiver [3.3-V 10Base-T/100Base-TX Integrated PHYceiver]
分类和应用:
文件页数/大小: 143 页 / 1665 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS1893BY-10 Data Sheet - Release  
Chapter 7 Management Register Set  
7.14.1 Node Configuration (bit 19.15)  
The Node Configuration bit indicates the NOD/MODE.  
In Node mode:  
– The SQE Test default setting is enabled.  
– The Carrier Sense signal (CRS) is asserted in response to either transmit or receive activity.  
The ICS1893BY-10 will only operate in the Node Configuration.  
7.14.2 Hardware/Software Priority Status (bit 19.14)  
The Hardware/Software Priority Status bit indicates the SW mode.  
The (MDIO) register bits control the ICS1893BY-10 configuration.  
The ICS1893BY-10 will only operate in the Software Configuration.  
7.14.3 Remote Fault (bit 19.13)  
The ISO/IEC specification defines bit 5.13 as the Remote Fault bit, and bit 19.13 is functionally identical to  
bit 5.13. The Remote Fault bit is set based on the Link Control Word received from the remote link partner.  
When this bit is a logic:  
Zero, it indicates the remote link partner does not detect a Link Fault.  
One, it indicates to an STA that the remote link partner detects a Link Fault.  
7.14.4 ICS Reserved (bits 19.12:10)  
See Section 7.11.2, “ICS Reserved (bits 16.14:11)”, the text for which also applies here.  
7.14.5 Auto-MDI/MDIX (bits 19. 9:8) (New)  
The ICS1893BY-10 includes the Auto-MDI/MDIX crossover feature. The Auto-MDI/MDIX feature  
automatically selects the correct MDI or MDIX configuration to match the cable plant by automatically  
swapping transmit and receive signal pairs at the PHY. Auto-MDI/MDIX is defaulted on but may be disabled  
for test purposes using either the AMDIX_EN (pin 10) or by writing (bits 19. 9:8). See Table 7-22 for  
AMDIX_EN (19,9) and MDI_MODE (19,8) operation.  
When AMDIX_EN (bit 19,9) is set to 0, the twisted pair transmit/receive is forced by the MDI_MODE bit  
(19,8).  
Note: Holding (Pin 3) AMDIX_EN low will also disable the Auto_MDIX function and force pins TP_AP and  
TP_AN to be the transmit pair and TP_BP and TP_BN to be the receive pair. AMDIX_EN has a  
built in 50K Ohm internal pull-up.  
Table 7-22. AMDIX_EN (Pin 10) and Control Bits 19. 9:8  
AMDIX_EN  
(Pin 3)  
AMDIX_EN  
[Reg 19:9]  
MDI_MODE  
[Reg 19:8]  
Tx/Rx MDI  
Configuration  
x
x
0
0
0
1
0
1
x
straight  
cross  
straight  
ICS1893BY-10 Rev A 3/24/04  
March, 2004  
Copyright © 2004, Integrated Circuit Systems, Inc.  
All rights reserved.  
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