ICS1893BY-10 - Release
Chapter 5 Interface Overviews
Figure 5-3 shows typical biasing and LED connections for the ICS1893BY-10.
Figure 5-3. ICS1893BY-10 LED - PHY Address
ICS1893BY-10
P4RD
64
P3TD
62
P2LI
60
P1CL
59
P0AC
55
REC
LINK
ACTIVITY
COL
TRANS
VDD
10KΩ
10KΩ
1KΩ
LED
10KΩ
1KΩ
LED
10KΩ
1KΩ
LED
10KΩ
This circuit decodes to PHY address = 1.
Note:
1. All LED pins must be set during reset.
2. PHY address 00 tri-states the MII interface.
3. For more reliable address capture during power-on reset, add a 10KΩ resistor across
the LED.
ICS1893BY-10 Rev A 3/24/04
March, 2004
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
35