ICS1523
Name: DPA Control Register
Register: 5h
Index: Read/Write*
Bit Name
Bit # Reset Value Description
DPA_Res0-1
Metal_Rev
0-1
2-7
3
0
Dynamic Phase Adjust Resolution Select.
Metal Mask Revision Number.
Bit
Name
Description
0-1
DPA_Res0-1
Dynamic Phase Adjust (DPA) Resolution Select.
It is not recommended to use the DPA above 160 MHz.
CLK Range, MHz
48
Bit 1 Bit 0 Delay Elements
0
0
1
1
0
1
0
1
16
32
Reserved
64
160
24
80
12
40
2-7
Metal_Rev
Metal Mask Revision Number.
After power-up, register bits 7:2 must be written with 111111. After this write,
a read indicates the metal mask revision, as below.
Revision Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
A
B
C1
C2
D
E
F
G
1
0
1
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
Double-buffered register. Actual working registers are loaded during software DPA reset.
See register 8h for details.
*
11
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
