IC61LV6432
READ/WRITE CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
-166
-133
-117
Symbol
tKC
Parameter
Cycle Time
Clock High Time
Clock Low Time
Min. Max. Min. Max. Min. Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
6
—
—
—
5
7.5
2.8
2.8
—
1.5
0
—
—
—
5
8.5
3
—
—
—
5
tKH
2.4
2.4
—
1.5
0
tKL
3
tKQ
Clock Access Time
—
1.5
0
1.5
—
0
(2)
tKQX
Clock High to Output Invalid
Clock High to Output Low-Z
Clock High to Output High-Z
Output Enable to Output Valid
Output Disable to Output Invalid
Output Enable to Output Low-Z
Output Disable to Output High-Z
Address Setup Time
Address Status Setup Time
Write Setup Time
Chip Enable Setup Time
Address Hold Time
—
—
5
—
—
5
—
—
6
(2,3)
tKQLZ
(2,3)
tKQHZ
1.5
—
1.5
—
tOEQ
5
5
5
(2)
tOEQX
0
0
—
—
—
3
0
0
—
—
—
3
—
—
4
(2,3)
tOELZ
0
(2,3)
tOEHZ
—
2.5
2.5
2.5
2.5
0.5
0.5
0.5
0.5
35
tAS
2.5
2.5
2.5
2.5
0.5
0.5
0.5
0.5
25
—
—
—
—
—
—
—
—
—
2.5
2.5
2.5
2.5
0.5
0.5
0.5
0.5
30
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
tSS
tWS
tCES
tAH
tSH
Address Status Hold Time
Write Hold Time
Chip Enable Hold Time
ConfigurationSetup
tWH
tCEH
(4)
tCFG
Notes:
1. ADVANCE INFORMATION ONLY.
2. Guaranteed but not 100% tested. This parameter is periodically sampled.
3. Tested with load in Figure 2.
4. Configuration signal MODE is static and must not change during normal operation.
14
Integrated Circuit Solution Inc.
SSR005-0A 002/02/2004
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
