Integrated
Circuit
Systems, Inc.
ICS83026I
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVCMOS/LVTTL F
ANOUT
B
UFFER
here are examples only. Please consult with the vendor of the
driver component to confirm the driver termination requirements.
For example in
Figure 2A,
the input termination applies for ICS
HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver
from another vendor, use their termination recommendation.
D
IFFERENTIAL
C
LOCK
I
NPUT
I
NTERFACE
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
SWING
and V
OH
must meet the
V
PP
and V
CMR
input requirements. Figures 2A to 2E show inter-
face examples for the HiPerClockS CLK/nCLK input driven by
the most common driver types. The input interfaces suggested
3.3V
3.3V
3.3V
1.8V
Zo = 50 Ohm
Zo = 50 Ohm
CLK
Zo = 50 Ohm
nCLK
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
R1
50
R2
50
R3
50
LVPECL
Zo = 50 Ohm
CLK
nCLK
HiPerClockS
Input
HiPerClockS
Input
R1
50
R2
50
F
IGURE
2A. H
I
P
ER
C
LOCK
S CLK/nCLK I
NPUT
D
RIVEN
ICS H
I
P
ER
C
LOCK
S LVHSTL D
RIVER
BY
F
IGURE
2B. H
I
P
ER
C
LOCK
S CLK/nCLK I
NPUT
D
RIVEN
3.3V LVPECL D
RIVER
BY
3.3V
3.3V
3.3V
R3
125
Zo = 50 Ohm
CLK
Zo = 50 Ohm
nCLK
LVPECL
R1
84
R2
84
HiPerClockS
Input
R4
125
3.3V
3.3V
LVDS_Driv er
Zo = 50 Ohm
CLK
R1
100
Zo = 50 Ohm
nCLK
Receiv er
F
IGURE
2C. H
I
P
ER
C
LOCK
S CLK/nCLK I
NPUT
D
RIVEN
3.3V LVPECL D
RIVER
BY
F
IGURE
2D. H
I
P
ER
C
LOCK
S CLK/nCLK I
NPUT
D
RIVEN
3.3V LVDS D
RIVER
BY
3.3V
3.3V
3.3V
LVPECL
Zo = 50 Ohm
C1
R3
125
R4
125
CLK
Zo = 50 Ohm
C2
nCLK
HiPerClockS
Input
R5
100 - 200
R6
100 - 200
R1
84
R2
84
R5,R6 locate near the driver pin.
F
IGURE
2E. H
I
P
ER
C
LOCK
S CLK/nCLK I
NPUT
D
RIVEN
3.3V LVPECL D
RIVER WITH
AC C
OUPLE
83026AMI
BY
www.icst.com/products/hiperclocks.html
7
REV. B NOVEMBER 9, 2004
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
