ICS601-25
L
OW
P
HASE
N
OISE
1
TO
5 C
LOCK
M
ULTIPLIER
Pin Assignment
X1/ICLK
VDD
S0
VDD
VDD
S1
GND
S3
PD
S2
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
X2
GND
VDD
CLK2
CLK3
GND
CLK4
CLK5
VDD
CLK1
Output Select Table
S3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
S2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Multiplier
x1
x2
x3
x4
x5
x6
x8
x16
x7
x9
x10
x11
x12
output tristates
x14
x15
20 Pin (150 mil) SSOP
Pin Descriptions
Pin
Number
1
2
3
4, 5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Name
X1/ICLK
VDD
S0
VDD
S1
GND
S3
PD
S2
CLK1
VDD
CLK5
CLK4
GND
CLK3
CLK2
VDD
GND
X2
Pin
Type
XI
Power
Input
Power
Input
Power
Input
Input
Input
Output
Power
Output
Output
Power
Output
Output
Power
Power
XO
Pin Description
Crystal or clock input. Connect to a 10-27 MHz fundamental parallel mode
crystal or clock input.
Connect to +3.3 V.
Select pin 0. Internal pull-up.
Connect to +3.3 V.
Select pin 1. Internal pull-up.
Connect to ground.
Select pin 3. Internal pull-down.
Powerdown when held low. Internal pull-up.
Select pin 2. Internal pull-up.
Clock output.
Connect to +3.3 V.
Clock output.
Clock output.
Connect to ground.
Clock output.
Clock output.
Connect to +3.3 V.
Connect to ground.
Crystal connection. Connect to a 10-27 MHz fundamental parallel mode
crystal or leave unconnected for clock input.
MDS 601-25 C
In te grated Circuit Systems
●
2
525 Ra ce Street, San Jose, CA 9512 6
●
Revision 071505
tel (4 08) 297-1 201
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ICS [ INTEGRATED CIRCUIT SYSTEMS ]
