Integrated
Circuit
Systems, Inc.
ICS85301
2:1
D
IFFERENTIAL
-
TO
-LVPECL M
ULTIPLEXER
gested here are examples only. If the driver is from another
vendor, use their termination recommendation. Please con-
sult with the vendor of the driver component to confirm the
driver termination requirements.
LVPECL C
LOCK
I
NPUT
I
NTERFACE
The PCLK /nPCLK accepts LVPECL, CML, SSTL and other
differential signals. Both V
SWING
and V
OH
must meet the V
PP
and V
CMR
input requirements.
Figures 2A to 2F
show inter-
face examples for the HiPerClockS PCLK/nPCLK input driven
by the most common driver types. The input interfaces sug-
3.3V
3.3V
3.3V
R1
50
CML
Zo = 50 Ohm
PCLK
Zo = 50 Ohm
nPCLK
HiPerClockS
PCLK/nPCLK
R2
50
3.3V
Zo = 50 Ohm
3.3V
R1
100
Zo = 50 Ohm
PCLK
nPCLK
HiPerClockS
PCLK/nPCLK
CML Built-In Pullup
F
IGURE
2A. H
I
P
ER
C
LOCK
S PCLK/nPCLK I
NPUT
D
RIVEN
BY AN
O
PEN
C
OLLECTOR
CML D
RIVER
F
IGURE
2B. H
I
P
ER
C
LOCK
S PCLK/nPCLK I
NPUT
D
RIVEN
BY A
B
UILT
-I
N
P
ULLUP
CML D
RIVER
3.3V
3.3V
3.3V
R3
125
Zo = 50 Ohm
PCLK
Zo = 50 Ohm
nPCLK
LVPECL
R1
84
R2
84
HiPerClockS
Input
R5
100 - 200
R6
100 - 200
R1
50
R2
50
Zo = 50 Ohm
C2
3.3V
3.3V
3.3V LVPECL
Zo = 50 Ohm
C1
PCLK
VBB
nPCLK
PC L K/n PC LK
R4
125
F
IGURE
2C. H
I
P
ER
C
LOCK
S PCLK/nPCLK I
NPUT
D
RIVEN
BY A
3.3V LVPECL D
RIVER
F
IGURE
2D. H
I
P
ER
C
LOCK
S PCLK/nPCLK I
NPUT
D
RIVEN
BY A
3.3V LVPECL D
RIVER WITH
AC C
OUPLE
2.5V
3.3V
2.5V
R3
120
SSTL
Zo = 60 Ohm
PCLK
Zo = 60 Ohm
nPCLK
HiPerClockS
PCLK/nPCLK
R4
120
3.3V
3.3V
Zo = 50 Ohm
LVDS
R5
100
Zo = 50 Ohm
R1
1K
R2
1K
C1
PCLK
C2
VBB
nPCLK
PC L K/n PC L K
R1
120
R2
120
F
IGURE
2E. H
I
P
ER
C
LOCK
S PCLK/nPCLK I
NPUT
D
RIVEN
BY AN
SSTL D
RIVER
F
IGURE
2F.
H
I
P
ER
C
LOCK
S PCLK/nPCLK I
NPUT
D
RIVEN
BY A
3.3V LVDS D
RIVER
85301AK
www.icst.com/products/hiperclocks.html
9
REV. A JANUARY 16, 2006
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
