Integrated
Circuit
Systems, Inc.
ICS85211BI-03
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVHSTL F
ANOUT
B
UFFER
F
EATURES
•
Two differential LVHSTL compatible outputs
•
One differential CLK, nCLK input pair
•
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
•
Maximum output frequency: 700MHz
•
Translates any single-ended input signal to
LVHSTL levels with resistor bias on nCLK input
•
Output skew: 30ps (maximum)
•
Part-to-part skew: 250ps (maximum)
•
Propagation delay: 1.3ns (maximum)
•
Output duty cycle: 49% - 51% up to 266.6MHz
•
V
OH
= 1.15V (maximum)
•
3.3V operating supply
•
-40°C to 85°C ambient operating temperature
•
Available in both standard and lead-free RoHS-compliant
packages
G
ENERAL
D
ESCRIPTION
The ICS85211BI-03 is a low skew, high perfor-
mance 1-to-2 Differential-to-LVHSTL Fanout
HiPerClockS™
Buffer and a member of the HiPerClockS™
family of High Performance Clock Solutions
from ICS. The CLK, nCLK pair can accept most
standard differential input levels.The ICS85211BI-03 is char-
acterized to operate from a 3.3V power supply. Guar-
anteed output and par t-to-par t skew characteristics
make the ICS85211BI-03 ideal for those clock distribu-
tion applications demanding well defined performance
and repeatability.
IC
S
B
LOCK
D
IAGRAM
Q0
nQ0
Q1
nQ1
P
IN
A
SSIGNMENT
Q0
nQ0
Q1
nQ1
1
2
3
4
8
7
6
5
V
DD
CLK
nCLK
GND
CLK
nCLK
ICS85211BI-03
8-Lead SOIC
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
85211BMI-03
www.icst.com/products/hiperclocks.html
1
REV. B NOVEMBER 15, 2005
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
