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TW8 参数 Datasheet PDF下载

TW8图片预览
型号: TW8
PDF下载: 下载PDF文件 查看货源
内容描述: 16位SIN / COS插补算法的自动校准 [16-BIT SIN/COS INTERPOLATOR WITH AUTO-CALIBRATION]
分类和应用:
文件页数/大小: 63 页 / 1930 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-TW8 16-BIT SIN/COS INTERPOLATOR  
Serial Configuration Mode  
Jan 9, 2013 Page SC8/36  
Digital Hysteresis  
Z Signal Path  
Digital hysteresis may be added to the interpolated  
sensor input angle to reduce AB output dithering  
(instability) at standstill at the expense of position  
error on direction reversal. A hysteresis range of 0 –  
22.5° of an input cycle in 0.044° steps is available.  
The actual hysteresis, hyst[°], is determined by the  
MAIN_HYST register in the CFG block in internal  
memory.  
The Z signal path is similar to the front end of the  
AB signal path except that a 1-bit ADC (compara-  
tor) is used.  
zgain = 8  
zth  
Comparator  
Delay Match  
ZERO+  
ZERO–  
To  
Output  
Generator  
Delay  
Figure 7: Z Signal Path  
Interpolation Factor  
The 16-bit sensor input angle value is scaled to the  
resolution required by the desired interpolation fac-  
tor. A range of 4 – 65,536 AB output edges per sen-  
sor Sin/Cos input cycle in steps of 1 edge is availa-  
ble. This is equivalent to a interpolation range of  
x1.00 – x16,384.00 AB output cycles per input cy-  
cle in steps of 0.25 AB output cycle. The actual in-  
terpolation factor, inter, is determined by the  
MAIN_INTER register in the CFG block in internal  
memory.  
A fixed analog gain of 8 is applied to the differential  
ZERO sensor input. A threshold offset is then added  
to the amplified ZERO signal to set the switching  
threshold of the comparator. The actual analog  
threshold level, zth, is determined by MAIN_Z in  
the CFG block in internal memory and has a range  
of ±300mV in 20mV steps. The effective ZERO  
input threshold therefore has a range of ±37.5mV in  
2.5mV steps.  
To ensure that the digital ZERO signal stays in syn-  
chronization with the digital sensor angle at all sen-  
sor speeds, a delay matching the inherent latency of  
the AB signal path is introduced into the Z signal  
path. The delayed and conditioned digital ZERO  
signal is then sent to the output generator where the  
Z output is generated and can be synchronized to the  
AB outputs.  
Output Generator  
The output generator generates quadrature AB out-  
puts or a pulse-width modulated (PWM) bit stream  
output depending on the output mode. The output  
mode is determined by MAIN_OUT.mode in the  
CFG block in internal memory. The output genera-  
tor also uses the conditioned ZERO signal from the  
Z signal path to generate a Z output that can be syn-  
chronized to the AB outputs.  
Auto Calibration and Auto Adaption  
The iC-TW8 provides sophisticated automatic cali-  
bration and adaption features to allow optimal pa-  
rameter values for the AB signal path to be set and  
maintained during operation. Auto calibration is  
used to determine initial parameter values when the  
iC-TW8 is first commissioned. The CALIB input  
(pin 5) or commands over one of the serial interfac-  
es may be used to initiate auto calibration.  
The output generator contains an optional divider  
that can be used in AB output mode to produce frac-  
tional interpolation factors. This is useful in situa-  
tions where the desired output resolution is not an  
integer multiple of the input resolution.  
Auto adaption is used to maintain (adapt) optimal  
parameter values for the AB signal path during op-  
eration. Auto adaption can adjust analog gain, ana-  
log offset correction, digital offset correction, digital  
gain match, and digital phase correction to ensure  
maximum interpolator accuracy under all operating  
conditions. Auto adaption is controlled by variables  
in the ADPT_CORR and ADPT_DETAIL registers  
in the CFG block of internal memory.  
Copyright © 2011–2013 iC-Haus  
http://www.ichaus.com  
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