iC-NQ
13-bit Sin/D CONVERTER WITH CALIBRATION
Rev D1, Page 16/25
ZPOS
Adr 0x01, Bit 4:0
CFGZ
Code
Adr 0x02, Bit 1:0
Length
Chip versions iC-NQ X2, iC-NQ X3:
Code
0x00
0x08
0x10
0x18
Position
0°
0x00
90°
0x01
180°
90°
0x02.. 03
Synchronization
180°
270°
Table 22: Zero Signal Length
Chip version iC-NQ V2:
Position
CFGAB
Code
0x00
Adr 0x03, Bit 5:4
Z = 1 for
Code
0x01
...
11.25° (1 x 11.25°)
...
B = 1, A = 1
B = 0, A = 1
B = 1, A = 0
B = 0, A = 0
0x01
0x1F
Notes
348.75° (31 x 11.25°)
0x02
The zero signal is only output if released by the
input pins (for instance with PZERO = 5 V, NZERO =
VREF).
0x03
Table 23: Zero Signal Logic
Table 21: Zero Signal Position
SIN
COS
A
B
Z (CFGZ= 0)
Z (CFGZ= 1)
Z (CFGZ= 2)
-180°
-90°
0°
45°
90°
180°
Winkel
Figure 14: Incremental output signals for various length of the zero signal.
Example for chip release iC-NQ V2 with resolution 64 (SELRES = 0x0A), a zero signal position
of 45° (ZPOS = 0x04, CFGAB = 0x00) and no reversal of the rotational sense (ROT = 0x00, COS
leads SIN).
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