iC-NQ
13-bit Sin/D CONVERTER WITH CALIBRATION
Rev D1, Page 15/25
INCREMENTAL SIGNALS
CFGABZ
Code
Adr 0x02, Bit 3:2
Mode
A
B
Z
0x00
Normal
A
B
Z
0x01
Control signals for
CA
CB
CZ
external period counters
0x02
0x03
Notes
Calibration mode
OFFS SIN
OFFS COS
PHASE
The following settings
are required additionally:
SELRES = 0x0D
ZPOS = 0x00
HYS = 0x07
ROT = 0x00
+...V
-...V
1.1
0.9
1.1
0.9
AERR = 0x00
Figure 7: Offset
SIN*
Figure 8: Offset
COS*
Figure 9: Phase*
Calibration mode
OFFS SIN
OFFS COS
RATIO
The following settings
are required additionally:
SELRES = 0x0D
ZPOS = 0x00
HYS = 0x07
ROT = 0x00
+...V
-...V
1.1
0.9
1.1
0.9
AERR = 0x00
Figure 10: Offset
SIN*
Figure 11: Offset
COS*
Figure 12: Amplitude*
*) Trimmed accurately when duty cycle is 50 %;
Recommended trimming order (after selecting GAIN): Offset, Phase, Amplitude Ratio, Offset;
Table 17: Outputs A, B, Z
ROT
Code
0x00
0x01
Adr 0x02, Bit 5
Direction
SIN
Not inverted
Inverted
COS
Table 18: Direction of Rotation
cw: F->0
FFFFFF
P(23:0)
000000
CBZ
Code
0x00
0x01
Adr 0x02, Bit 4
Clear by zero
Disabled
ccw: 0->F
A
B
Enabled
Z
Table 19: Reset Enable for Period Counter
-180°
-90°
0°
45°
90°
180°
Figure 13: Clear by zero function of the period
counter when enabled by CBZ = 1.
Example for chip release iC-NQ V2
at resolution 64 (SELRES = 0x0A),
zero signal at 45° (ZPOS = 0x04, CF-
GAB = 0x00) and the direction of rotation
not inverted (ROT = 0x00, COS leads
SIN).
ENRESDEL Adr 0x02, Bit 7
Code
0x00
Output*
Function
immediately
An external counter displays the
absolute angle following power on.
0x01
after 5 ms
An external counter only displays
changes vs. the initial power-on
condition (moving halted to
reapply power is precondition.)
Notes
*) Output delay after device configuration and
internal reset.
Table 20: Output Turn-On Delay A, B, Z
ICHAUS [ IC-HAUS GMBH ]
