iC-NQC
13-bit Sin/D CONVERTER WITH SIGNAL CALIBRATION
Rev D1, Page 19/29
I/O INTERFACE: BiSS C PROTOCOL
The serial I/O interface operates in BiSS C protocol Interface Parameters With BiSS C Protocol
mode and enables sensor data to be output in uninter-
ruptible cycles (data channel SCD). At the same time
parameters can be exchanged via bidirectional register
communication (data channel CD).
SELSSI
Adr 0x02, Bit 6
Protocol
The sensor data produced by iC-NQC contains the an-
gle value (S) with 3 to 13 bits, the period count (P) with
0, 8, 12 or 24 bits, two error bits (E1 and E0) and 5 or
6 CRC bits (CRC).
Code
Information
0
1
BiSS C
SSI
www.biss-interface.com
Table 33: Protocol version
TIMO
Adr 0x06, Bit 5
Code
Clock
Timeout ttos
ca. 20 µs
fclk(MA) min*
50 kHz
0
46-47
Figure 16: Example line signals (BiSS C)
1
3-4
ca. 1.5 µs
660 kHz
TOA
Addr 0x07, Bit 3
see TIMO
adaptive with
Single Cycle Data Channel: SCD
0
1
Bits
Typ
Label
see BiSS
50 kHz
0...24
DATA
Period counter P(23:0):
TCLK
=
specification
0, 8, 12, 24 bit (multiturn position)
42/fosc
32
fosc
3...13
DATA
Angle data S(12:0):
3 bis 13 bit (singleturn position)
Notes
A ref. clock count is equal to
A02).
(see El. Char.,
The permissible max. clock frequency is specified
by E06.
*) A low clock frequency can reduce the permissible
maximum input frequency since conversion is
paused for one MA cycle from Latch onwards.
1
ERROR
ERROR
CRC
Error bit E1 (amplitude error)
Error bit E0 (frequency error)
1
5...6
Polynomial 0x25
x5 + x2 + x0 (inverted bit output)
- oder -
Polynomial 0x43
Table 34: Timeout configuration (protectable)
x6 + x1 + x0 (inverted bit output)
Table 32: BiSS data channels
M2S
Adr 0x00, Bit 6:5
Code
0x00
0x01
0x02
0x03
Data Length
-
CRC Polynomial
0x25 (with CRC6 = 0)
0x25 (with CRC6 = 0)
0x43
P(7:0)
P(11:0)
P(23:0)
0x43
Table 35: Period counter output
CRC6
Code
0
Adr 0x03, Bit 7
CRC Polynomial
determined by M2S
0x43
Status Messages
E1, E0
nE, nW
1
Table 36: CRC polynomial
ICHAUS [ IC-HAUS GMBH ]
