iC-NQC
13-bit Sin/D CONVERTER WITH SIGNAL CALIBRATION
Rev D1, Page 18/29
If an error in amplitude occurs, conversion is termi- error in amplitude rules out the possibility of an error in
nated and the incremental output signals halted. An frequency.
TEST FUNCTIONS
TMODE
Code
0x00
Adr 0x06, Bit 3:1
Signal at Z
Z
TMA
Code
0x00
0x01
Notes
Adr 0x06, Bit 0
Description
Pin A
A
Pin B
Pin SDA
SDA
Pin SCL
SCL
no test mode
B
0x01
A xor B
Output A EXOR B
iC-Haus device test
iC-Haus device test
iC-Haus device test
iC-Haus device test
iC-Haus device test
iC-Haus device test
COS+
COS-
SIN+
SIN-
0x02
ENCLK
To permit the verification of GAIN and OFFSET
settings, signals are output after the input amplifier.
A converter signal of 4 Vpp is the ideal here and
should not be exceeded. Pin loads above 1 MΩ are
adviceable for accurate measurements.
0x03
NLOCK
0x04
CLK
0x05
DIVC
0x06
PZERO - NZERO
TP
EEPROM access is not possible during mode TMA.
0x07
Table 31: Analog test mode
Condition
CFGABZ = 0x00
Table 30: Test mode
The signal is set to ca. 4 Vpp using GAIN and must not
be altered after calibration. Both display modes are
suitable for OFFS (positive values) and RATIO adjust-
ments; X/Y mode is preferable for PHASE. Test signals
COS- (pin B) and SIN- (pin SCL) must be selected to
set negative values for OFFS.
5 V
A: COS+
SDA: Sin+
0 V
Y/T 1 V/Div vert.
1 V/Div vert. 1 V/Div hor.
X/Y
Figure 15: Calibrated signals in TMA mode.