iC-MQ PROGRAMMABLE 9-BIT
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
Rev D4, Page 11/39
PROGRAMMING
Register Map, Overview . . . . . . . . . . . . . . . . . . . Page 12 Signal Conditioning CH0 (X1, X2) . . . . . . . . . Page 24
GR0:
GF0:
VOS0:
OR0:
OF0:
Gain Range CH0 (coarse)
Gain Factor CH0 (fine)
Offset Reference Source CH0
Offset Range CH0 (coarse)
Offset Factor CH0 (fine)
Serial Configuration Interface . . . . . . . . . . . . . Page 14
ENFAST:
ENSL:
I2C Fast Mode Enable
I2C Slave Mode Enable
DEVID:
Device ID of EEPROM providing the
chip configuration data (e.g. 0x50)
CRC of chip configuration data
(address range 0x00 to 0x2F)
Chip Release
CHKSUM:
Signal Level Controller . . . . . . . . . . . . . . . . . . . . Page 25
ADJ: Setup of ACO Output Function
CHPREL:
END:
Sine-To-Digital Conversion . . . . . . . . . . . . . . . . Page 26
SELRES:
SELHYS:
Configuration Enable
Resolution
Hysteresis
Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 16
CFGIBN:
CFGTA:
Bias Current
Temperature Monitoring
Quadrature Output Logic . . . . . . . . . . . . . . . . . . Page 27
CFGABZ: Output Logic
CFGZPOS: Zero Signal Positioning
ENZFF: Zero Signal Synchronisation
Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . Page 17
MODE: Operating Mode
Input Configuration
and Signal Path Multiplexer . . . . . . . . . . . . . . . Page 19
Quadrature Output Settings . . . . . . . . . . . . . . . Page 29
MTD:
SIK:
SSR:
TRIHL:
Minimum Phase Distance
Driver Short-Circuit Current
Driver Slew Rate
INMODE:
RIN12:
Diff./Single-Ended Input Mode
I/V Mode and Input Resistance CH1,
CH2
Driver Mode
BIAS12:
RIN0:
BIAS0:
BIASEX:
INVZ:
Reference Voltage CH1, CH2
I/V Mode and Input Resistance CH0
Reference Voltage CH0
Input Reference Selection
Index Signal Inversion
Error Monitoring and Alarm Output . . . . . . . Page 30
EMTD:
EPH:
EPU:
Minimal Alarm Indication Time
Alarm Input/Output Logic
Alarm Output Pull-Up Enable
Error Mask For Alarm Indication (pin
ERR)
EMASKA:
MUXIN:
Input-To-Channel Assignment:
X3...X6 to CH1, CH2
EMASKE:
EMASKO:
PDMODE:
LINECNT:
Error Mask For Protocol (EEPROM)
Error Mask For Driver Shutdown
Driver Activation After Cycling Power
Line Count (Pulses) Between 2 Zero
Pulses
Error Protocol: First Error
Error Protocol: Last Error
Error Protocol: History
Signal Conditioning CH1, CH2 (X3...X6) . . . Page 21
GR12:
GF1:
Gain Range CH1, CH2 (coarse)
Gain Factor CH1 (fine)
GF2:
Gain Factor CH2 (fine)
VOS12:
VDC1:
VDC2:
OR1:
Offset Reference Source CH1, CH2
Intermediate Voltage CH1
Intermediate Voltage CH2
Offset Range CH1 (coarse)
Offset Factor CH1 (fine)
ERR1:
ERR2:
ERR3:
Test Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Page 33
OF1:
OR2:
OF2:
PH12:
Offset Range CH2 (coarse)
Offset Factor CH2 (fine)
Phase Correction CH1 vs. CH2
EMODE:
EMODE2:
Test Mode
Register And Address Selection For
Test Mode
ICHAUS [ IC-HAUS GMBH ]
