iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev D1, Page 20/59
OVERVIEW
Adr
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
STATUS Register (with read access)
0x75
0x76
0x77
TH_WRN
ACS_MAX
CMD_EXE
EPR_ERR
AM_MIN
AN_MIN
FRQ_WDR
AM_MAX
AN_MAX
FRQ_STUP
ACM_MIN
ACN_MIN
NON_CTR
ACM_MAX
ACN_MAX
MT_CTR
CT_ERR
AS_MIN
MT_ERR
RF_ERR
AS_MAX
MT_WRN
TH_ERR
ACS_MIN
COMMAND Register: MN_CMD (with write access)
0x77
0
0
0
0
0
MN_CMD(2:0)
Device Identification (preset values after start-up without EEPROM)
0x78
0x79
0x7A
0x7B
0x7C
0x7D
0x7E
0x7F
Hints
0x4D ≡ M
0x4E ≡ N
Internal identifier (0x04 ≡ Y2)
0
0
0
BANK_ACT*
GRAY_SCD
M2S(1:0)
DL_MT(3)
equivalent to address 0x4C
equivalent to address 0x3E
0x69 ≡ i
0x43 ≡ C
All registers can be written and read as long as no protection level has been set (see PROT_E2P). Addresses with gray
face box are located in the external EEPROM
*) Bank selection is active. BANK_ACT = 1, if CFG_E2P /= 000
Table 7: Register layout