iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev D1, Page 16/59
CONFIGURATION PARAMETERS
Analog Parameters (valid for all channels)
I/O Interface With Extended Functions
NBISS:
TOS:
DL_ST:
M2S:
Interface Protocol (P. 38)
Timeout (S. 38)
ST Data Length (P. 39)
MT Data Output (P. 39)
Inversion Of Code Direction (P. 39)
CFGIBP:
CFGTA:
DCPOS:
ENF:
CVREF:
REFVOS:
RIN:
Bias Trimming (P. 28)
Temperature Sensor Calib. (P. 28)
Input Current Polarity (P. 23)
Noise Filter Enable (P. 28)
VREF Source Selection (P. 23)
Offset Reference Source (P. 24)
Input Resistance (P. 23)
DIR:
GRAY_SCD: Data Format (P. 39)
CID_SCD:
NC_BISS:
ELC:
CRC Start Value (P. 39)
Communication Disable (S. 39)
Lifecounter (P. 40)
TUIN:
UIN:
Input Voltage Divider (P. 23)
Signal Mode (P. 23)
Driver Settings
Signal Conditioning
x = M, S, N (for master, segment, nonius channel)
DSC:
DTRI:
DSR:
Driver Short-Circuit Current (P. 41)
Driver Output Mode (P. 41)
Driver Slew Rate (P. 41)
ACOC_x:
ACOR_x:
ACOT_x:
GFC_x:
GR_x:
Signal Level Control: Current (P. 27)
Signal Level Control: Range (P. 27)
Signal Level Control: Op. Mode (P. 27)
Gain Factor Cosine (P. 24)
Command And Status Register
STATUS:
Status Register (P. 43)
MN_CMD:
Implemented Commands (P. 42)
Gain Range (P. 24)
AUTORES: Automatic Reset Function (S. 42)
GFS_x:
MPS_x:
MPC_x:
OFC_x:
ORC_x:
OFS_x:
ORS_x:
PH_x:
Gain Factor Sine (P. 24)
Intermediate Voltage Sine (P. 25)
Intermediate Voltage Cosine (P. 25)
Offset Factor Cosine (P. 26)
Offset Range Cosine (P. 25)
Offset Factor Sine (P. 25)
Error And Warning Bit
CFGEW:
S2ERR:
S2WRN:
E2EPR:
Error And Warning Bit Config. (P. 44)
Visibility For Warning Bit (P. 45)
Visibility For Error Bit (P. 45)
Diagnosis Memory Enable (P. 43)
Offset Range Sine (P. 25)
S/C Phase Correction (P. 26)
MT Interface
MODE_MT: MT Interface Operating Mode (P. 46)
DL_MT:
SBL_MT:
LNT_MT:
MT Data Length (P. 46)
Operating Modes
TRACMODE: Op. Mode Parameter (P. 21)
MT Synch. Bit Length (P. 47)
Leading/Trailing Gear Box Assembly
(P. 47)
CALMODE:
BYP:
Op. Mode Parameter (P. 21)
Bypass Switch (P. 21)
CHK_MT:
Period Counter Verification (P. 47)
GRAY_MT: MT Interface Data Format (P. 47)
Sine-To-Digital Conversion
MODE_ST: S/D Conversion Mode (P. 30)
MT Interface with Extended Functions
MODE_MT: MT Interface Operating Mode (P. 46)
UBL_M:
UBL_N:
SBL_N:
UBL_S:
SBL_S:
FRQ_TH:
SPO_N:
SPO_S:
Bit Length Master (P. 29)
Used Bit Length Nonius (P. 29)
Synch. Bit Length Nonius (P. 29)
Used Bit Length Segment (P. 29)
Synch. Bit Length Segment (P. 29)
Signal Frequency Monitoring (P. 32)
Offset Nonius Track (P. 35)
GET_MT:
Direct BiSS Communication Enable for
MT Sensor via I/O Interface (P. 49)
NCRC_MT: MT Interface CRC Verification (P. 49)
SWC_MT: MT Interface CRC Polynomial (P. 49)
Preset Function
OFFS_ST: Position Offset for ST Data Output
(P. 50)
Offset Segment Track (P. 35)
PRES_ST: Preset Value for ST Data Output (P. 50)
OFFS_MT: Position Offset for MT Data Output
(P. 50)
I/O Interface
TOS:
DL_ST:
M2S:
Timeout (P. 36)
ST Data Length (P. 36)
MT Data Output (P. 39)
Error Bit (P. 37)
PRES_MT: Preset Value for MT Data Output (P. 50)
ESSI:
EEPROM Interface
GRAY_SCD: Data Format (P. 37)
CFG_E2P: Config. Of External Memory (P. 52)
CRC_E2P: EEPROM Data Check Sum (P. 52)
PROT_E2P: Register Access Control (P. 53)
RSSI:
DIR:
Ring Operation (P. 37)
Inversion Of Code Direction (P. 37)
ICHAUS [ IC-HAUS GMBH ]
