iC-MH
12 BIT ANGULAR HALL ENCODER
Rev B1, Page 20/23
mode it is not possible to vary the parameter set. The justified and filled with preceding zeros if necessary.
data is transmitted as reduced Gray code, e.g. after The following table shows the data length according to
converting into binary code, the data range is symmet- the resolution.
rical to the center of the number string. For example,
with a set resolution of 360 data values between 76
and 435 are transmitted.
DLEN
Adr 0x43; Bit 3:0
2
CFGRES = ’00000000’, 4
3
CFGRES = ’00000001’, 8
4
CFGRES = ’0000001x’, 12 to 16
CFGRES = ’000001xx’, 20 to 32
CFGRES = ’00001xxx’, 36 to 64
CFGRES = ’0001xxxx’, 68 to 128
CFGRES = ’001xxxxx’, 132 to 256
CFGRES = ’01xxxxxx’, 260 to 512
CFGRES = ’10000000’, 1024
CFGRES = ’10000001’, 2048
CFGRES = ’10000010’, 4096
5
6
7
8
9
10
11
12
Figure 24: SSI protocol, data GRAY-coded
The register range 0x00 to 0x0F is equivalent to the
settings with which the IC can be parameterized. The
settings directly affect the corresponding switching
parts. It is important to note that test register 0x0E can
only be written to when pin VZAP is connected to VPD.
When VPD > 6 V, write access to the test register is ig-
nored. Register 0x0F can be configured at potentials
V(VZAP) > Vt(VZAP)hi.
Table 30: Data length
The status register provides information on the status
of the module. There are 5 different errors that can
be signaled. Following unsuccessful programming of
the zapping diodes, the bit PROGERR is set. If an
attempt is made to read the current position via the se-
rial interface during the start-up phase, an error is sig-
naled with ERRSDATA, as the actual position is not yet
known. The ERRAMAX bit is output to signal that the
amplitude is too high, while the ERRAMIN bit signals
an amplitude which is too low, caused, for example, by
too great a distance to the magnet. If the NERR pin
is pulled against VND outside the module, this error is
also signaled via the serial interface. The ERREXT bit
is then equal to ’1’. The error bits are reset again after
the status register is read out at the address 0x77. The
error bit in the data word is then also read in the next
cycle as ’0’.
The range 0x10 to 0x1F is read-only and reflects the
contents of the integrated zapping diodes. Following
programming the data can be verified via these ad-
dresses. After the supply voltage is connected, the
contents of the zapping diodes are copied to the RAM
area 0x00 to 0x0F. Then the settings can be overwrit-
ten via the serial interface. Overwriting is not possible
if the CFGPROT bit is set.
Errors in the module are signaled via the error mes-
sage output NERR. This open-drain output signals an
error if the output is pulled against VND. If the er-
ror condition no longer exists, then the pin is released
again after a waiting time of approximately 1 ms. If the
integrated pull-up resistor is deactivated with DPU =
’1’, then an external resistor must be provided. With
DPU = ’0’ it brings the pin up to the high level again.
CFGTOS
CFGTOB
Timeout
16 µs
2 µs
0
1
x
0
0
1
2 µs
Table 31: Timeout for sensor data
DPU
Adr 0x04; Bit 6
Pull-up activated
0
1
Pull-up deactive
The timeout can be programmed to a shorter value
with the CFGTOS bit. However, this setting is reset
to the default value 16 µs again following a reset. The
timeout can be permanently programmed for faster
data transmission with the CFGTOB register via a zap-
ping diode. Resetting to slower data transmission is
then not possible.
Table 29: Activation of NERR pull-up
With the profile ID, the data format can be requested
for the following sensor data cycles in the module. A
read operation at address 0x42 results in 0x2C, with is
the equivalent to 12-bit single-cycle data. The register
0x43 which follows now contain the data length DLEN The registers 0x7D to 0x7F are reserved for the man-
of the transmitted sensor data in accordance with the ufacturer and can be provided with an ID so that the
set resolution. The sensor data are transmitted right- manufacturer can identify its modules
ICHAUS [ IC-HAUS GMBH ]
