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IC-MHEVALMH1D 参数 Datasheet PDF下载

IC-MHEVALMH1D图片预览
型号: IC-MHEVALMH1D
PDF下载: 下载PDF文件 查看货源
内容描述: 12几分棱角霍尔编码器 [12 BIT ANGULAR HALL ENCODER]
分类和应用: 编码器
文件页数/大小: 23 页 / 473 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-MH  
12 BIT ANGULAR HALL ENCODER  
Rev B1, Page 13/23  
Test Mode: Analog REF  
reference (1.24 V), with VOSR (0.5 V) used to gener-  
ate the range of the offset settings. Bias current IBM  
determines the internal current setting of the analog  
circuitry. In order to compensate for variations in this  
current and thus discrepancies in the characteristics  
of the individual iC-MH devices (due to fluctuations in  
production, for example), this can be set within a range  
of -40% to +35% using register parameter CIBM. The  
nominal value of 200 µA is measured as a short-circuit  
current at pin B to ground.  
iC-MH  
A
B
Z
VREF  
~ 2.5 V  
IBM  
VBG  
VOSR  
~ 1.24 V  
~ 0.5 V  
U
~ 200 µA  
VNA  
C021107-4  
Test mode Digital CLK  
If, due to external circuitry, it is not possible to mea-  
sure IBM directly, by way of an alternative clock signal  
CLKD at pin A can be calibrated to a nominal 1 MHz  
in this test mode via register value CIBM.  
Figure 10: Setting bias current IBM in test mode  
Analog REF  
Calibration procedure  
The calibration procedure described in the following  
applies to the optional setting of the internal analog  
sine and cosine signals and the mechanical adjust-  
ment of the magnet and iC-MH in relation to one an-  
other.  
Vsin  
+2 V  
BIAS SETTING  
a
-2 V  
+2 V  
The BIAS setting compensates for possible manufac-  
turing tolerances in the iC-MH devices. A magnetic  
field does not need to be present for this setting which  
can thus be made either prior to or during the assem-  
bly of magnet and iC-MH.  
Vcos  
If the optional setup process is not used, register CIBM  
should be set to an average value of 0x8 (which is  
equivalent to a change of 0%). As described in the  
previous section, by altering the value in register CIBM  
in test mode Analog REF current IBM is set to 200 µA  
or, alternatively, in test mode Digital CLK signal CLKD  
is set to 1 MHz.  
-2 V  
C141107-1  
Figure 11: Ideal Lissajous curve  
CALIBRATION USING ANALOG SIGNALS  
In test mode Analog OUT as shown in Figure 5 the in-  
ternal signals which are transmitted to the sine/digital  
converter can be tapped with high impedance. With  
a rotating magnet it is then possible to portray the dif-  
ferential signals VSIN and VCOS as an x-y graph (Lis-  
sajous curve) with the help of an oscilloscope. In an  
ideal setup the sine and cosine analog values describe  
a perfect circle as a Lissajous curve, as illustrated by  
Figure 11.  
MECHANICAL ADJUSTMENT  
iC-MH can be adjusted in relation to the magnet in test  
modes Analog SIN and Analog COS, in which the Hall  
signals of the individual Hall sensors can be observed  
while the magnet rotates.  
In test mode Analog SIN the output signals of the sine  
Hall sensors which are diagonally opposite one an-  
other are visible at pins A, B, Z and U. iC-MH and the At room temperature and with the amplitude control  
magnet are then adjusted in such a way that differen- switched off (ENAC = 0) a rough GAING setting is se-  
tial signals VPSIN and VNSIN have the same amplitude lected so that at an average fine gain of GAINF = 0x20  
and a phase shift of 180°. The same applies to test (a gain factor of ca. 4.5) the Hall signal amplitudes are  
mode Analog COS, where differential signals VPCOS as close to 1 V as possible. The amplitude can then  
and VNCOS are calibrated in the same manner.  
be set more accurately by varying GAINF. Variations in  
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