iC-MFL / iC-MFLT
8-/12-FOLD FAIL-SAFE LOGIC N-FET DRIVER
Rev C1, Page 4/13
PIN CONFIGURATION QFN28
5 mm x 5 mm to JEDEC MO220
PIN FUNCTIONS
No. Name Function
1 OUT2 5 V Output channel 2
2 OUT1 5 V Output channel 1
3 GNDR Ground (Resistor)
27
24
23
28
26
25
22
4 VCC
5 IN1
6 IN2
7 IN3
8 IN4
5 V Supply Voltage
Input channel 1
Input channel 2
Input channel 3
Input channel 4
Input channel 5
Input channel 6
Input channel 7
Input channel 8
Input channel 9
Input channel 10
Input channel 11
Input channel 12
Enable Input
1
2
21
20
19
18
17
16
15
3
9 IN5
MFLT
4
5
6
7
10 IN6
11 IN7
12 IN8
13 IN9
14 IN10
15 IN11
16 IN12
17 EN
18 GND
code...
...
12
8
9
10
11
13
14
Ground
19 OUT12 5 V Output channel 12
20 OUT11 5 V Output channel 11
21 OUT10 5 V Output channel 10
22 OUT9 5 V Output channel 9
23 OUT8 5 V Output channel 8
24 OUT7 5 V Output channel 7
25 OUT6 5 V Output channel 6
26 OUT5 5 V Output channel 5
27 OUT4 5 V Output channel 4
28 OUT3 5 V Output channel 3
TP
Thermal-Pad
The Thermal Pad is to be connected to a ground plane on the PCB. Connections between GND, GNDR and the
ground plane should be conciled to system FMEA aspects.