iC-MFL / iC-MFLT
8-/12-FOLD FAIL-SAFE LOGIC N-FET DRIVER
Rev C1, Page 4/13
PIN CONFIGURATION QFN28
5 mm x 5 mm to JEDEC MO220
PIN FUNCTIONS
No. Name Function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
OUT2
OUT1
GNDR
VCC
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
EN
GND
OUT12
OUT11
OUT10
OUT9
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
TP
5 V Output channel 2
5 V Output channel 1
Ground (Resistor)
5 V Supply Voltage
Input channel 1
Input channel 2
Input channel 3
Input channel 4
Input channel 5
Input channel 6
Input channel 7
Input channel 8
Input channel 9
Input channel 10
Input channel 11
Input channel 12
Enable Input
Ground
5 V Output channel 12
5 V Output channel 11
5 V Output channel 10
5 V Output channel 9
5 V Output channel 8
5 V Output channel 7
5 V Output channel 6
5 V Output channel 5
5 V Output channel 4
5 V Output channel 3
Thermal-Pad
28
27
26
25
24
23
22
1
2
3
4
5
6
7
21
20
19
MFLT
code...
...
18
17
16
15
8
9
10
11
12
13
14
The
Thermal Pad
is to be connected to a ground plane on the PCB. Connections between GND, GNDR and the
ground plane should be conciled to system FMEA aspects.