iC-MFL / iC-MFLT
8-/12-FOLD FAIL-SAFE LOGIC N-FET DRIVER
Rev C1, Page 2/13
DESCRIPTION
iC-MFL / iC-MFLT is a monolithically integrated, Should the supply voltage at VCC undershoot a pre-
8/12-channel level adjustment device which drives defined threshold, the voltage monitor causes the
N-channel FETs. The internal circuit blocks have outputs to be actively tied to GND via the lowside
been designed in such a way that with single er- transistors. If the supply voltage ceases to be applied
rors, such as open pins (VCC, GND, GNDR) or to VCC, the outputs are tied to GNDR by pull-down
the short-circuiting of two outputs, iC-MFL’s output resistors.
stages switch to a predefined, safe low state. Exter-
nally connected N-channel FET are thus shut down If the connection between the ground potential and
safely in the event of a single error.
the GND pin is disrupted, the highside and lowside
transistors of the output stages are shut down and
The inputs of the eight/twelve channels consist of the outputs tied to GNDR via the pull-down resistors.
a Schmitt trigger with a pull-down current source If on the other hand the connection between ground
and are compatible with TTL and CMOS levels (1.8 potential and the GNDR pin is disrupted, only the
to 5 V). The eight/twelve channels have a current- output stage highside transistors are shut down; the
limited push-pull output stage and a pull-down resis- outputs are then actively tied to GND via the lowside
tor at the output. The output stages supply an output transistors.
signal of 5 V and are enabled by a high signal at pin
EN. Furthermore, all stages can handle surge volt- Open inputs IN1...8/12 and EN are actively tied to
age pulses (max. 18 V, pulse width < 100 ms, max. GND by pull-down currents. The pull-down currents
2 % duty cycle) at the output.
have two stages in order to limit power dissipation
with enhanced noise immunity.
iC-MFL monitors the supply voltage at VCC pin and
the voltages at the two ground pins GND and GNDR. When two outputs of different logic states are short
The pins GND and GNDR must be connected to- circuited, the driving capability of the lowside driver
gether externally in order to guarantee the safe low predominates, keeping the connected N-channel
state of the output stages in the event of error.
FETs in a safe shutdown state.
The device is protected against destruction by ESD.
PACKAGES
ICHAUS [ IC-HAUS GMBH ]
