iC-MFL / iC-MFLT
8-/12-FOLD FAIL-SAFE LOGIC N-FET DRIVER
Rev C1, Page 3/13
PIN CONFIGURATION QFN24
4 mm x 4 mm to JEDEC MO220
PIN FUNCTIONS
No. Name Function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
OUT1
-
-
GNDR
VCC
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
-
EN
-
GND
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
TP
5 V Output channel 1
(n.c.)
(n.c.)
Ground (Resistor)
5 V Supply Voltage
Input channel 1
Input channel 2
Input channel 3
Input channel 4
Input channel 5
Input channel 6
Input channel 7
Input channel 8
(n.c.)
Enable Input
(n.c.)
Ground
5 V Output channel 8
5 V Output channel 7
5 V Output channel 6
5 V Output channel 5
5 V Output channel 4
5 V Output channel 3
5 V Output channel 2
Thermal-Pad
The
Thermal Pad
is to be connected to a ground plane on the PCB. Connections between GND, GNDR and the
ground plane should be conciled to system FMEA aspects.