欢迎访问ic37.com |
会员登录 免费注册
发布采购

IC-MDTSSOP20 参数 Datasheet PDF下载

IC-MDTSSOP20图片预览
型号: IC-MDTSSOP20
PDF下载: 下载PDF文件 查看货源
内容描述: 编码器接收器/计数器, SPI和BiSS接口 [ENCODER RECEIVER/COUNTER WITH SPI AND BiSS]
分类和应用: 计数器编码器
文件页数/大小: 23 页 / 451 K
品牌: ICHAUS [ IC-HAUS GMBH ]
 浏览型号IC-MDTSSOP20的Datasheet PDF文件第1页浏览型号IC-MDTSSOP20的Datasheet PDF文件第2页浏览型号IC-MDTSSOP20的Datasheet PDF文件第3页浏览型号IC-MDTSSOP20的Datasheet PDF文件第5页浏览型号IC-MDTSSOP20的Datasheet PDF文件第6页浏览型号IC-MDTSSOP20的Datasheet PDF文件第7页浏览型号IC-MDTSSOP20的Datasheet PDF文件第8页浏览型号IC-MDTSSOP20的Datasheet PDF文件第9页  
iC-MD RS-422 QUADRATURE  
ENCODER RECEIVER/COUNTER WITH SPI AND BiSS  
Rev A1, Page 4/23  
ELECTRICAL CHARACTERISTICS  
Operating Conditions: VDD = 3 . . . 5.5 V, Tj = -40 . . . 125 °C, unless otherwise noted.  
Item Symbol  
No.  
Parameter  
Conditions  
Unit  
Min.  
Typ.  
Max.  
General  
001 VDD  
Voltage Supply VDD  
3
5.5  
15  
V
002  
I(VDD)  
Supply Current in VDD  
TTL input configuration, 48 bits counter  
10 MHz signal in AP (0º phase) and AN  
(90º phase), BP, BN, CP and CN to GND  
mA  
003 Vc()hi  
004 Vc()lo  
Clamp Voltage hi  
Clamp Voltage lo  
Vc()hi = V() - VDD, I() = 1 mA  
Vc()hi = V() - VDD, I() = 10 mA  
0.4  
1.5  
V
V
-1.5  
-0.25  
Digital Inputs: MA, SLI, SCK, MOSI, NCS, TPI  
101 Vt()hi  
102  
Input Threshold Voltage hi  
Input Threshold Voltage lo  
2
V
Vt()lo  
VDD = 4.5 . . . 5.5 V  
VDD = 3 . . . 5.5 V  
0.8  
0.75  
V
V
103 Vt()hys  
104 Ipd()  
Input Hysteresis  
150  
2
250  
30  
mV  
µA  
Input Pull-down Current at  
SCK, MOSI, TPI  
V() = 1 V . . . VDD  
75  
-2  
105 Ipu()  
Input Pull-Up Current at  
NCS, MA  
V() = 0 V . . . VDD - 1 V  
-75  
-30  
µA  
106  
fclk(MA)  
Permissible Clock Frequency at  
MA  
NBISS = 1 (SSI protocol)  
NBISS = 0 (BiSS protocol)  
4
10  
MHz  
MHz  
107 Voc()  
108  
Pin Open Voltage at SLI  
Internal Resistance at SLI  
42  
46.5  
51  
%VDD  
Ri()  
Referenced to VDD  
Referenced to GND  
70  
40  
170  
110  
kΩ  
kΩ  
109 fclk(SCK) Permissible Clock Frequency at  
SCK  
10  
MHz  
Bidirectional Pins: NWARN, NERR  
201 Ipu()  
202 Vt()hi  
Pull-Up Current  
V() = 0 V . . . VDD - 1 V  
-750  
-100  
250  
-10  
2
µA  
V
Input Threshold Voltage hi  
Input Threshold Voltage lo  
203  
Vt()lo  
VDD = 4.5 . . . 5.5 V  
VDD = 3 . . . 5.5 V  
0.8  
0.75  
V
V
204  
Vt()hys  
Input Hysteresis  
150  
mV  
205 Vs()lo  
206 Isc()lo  
ABZ Counter  
301 R()  
Saturation Voltage lo  
I() = 4 mA  
450  
100  
mV  
mA  
Short-Circuit Current lo  
V() = 0 V . . . VDD  
4
Counter Resolution  
48  
40  
bit  
302 fcnt()  
Permissible Count Frequency  
Permissible A/B Phase Distance  
MHz  
303  
PHab2  
edge A vs. edge B and vice versa  
TTL=1  
TTL=0, LVDS=X  
5
13  
ns  
ns  
Power-Down Reset and Oscillator  
601 VDDon  
602 VDDoff  
603 VDDhys  
Power-On Supply Voltage  
2.9  
5.3  
V
V
Power-Down Voltage  
Power-On Hysteresis  
2.1  
35  
VDDon - VDDoff  
100  
mV  
MHz  
604 Frq(CLK) Internal Oscillator Frequency  
1.4  
Digital Outputs: SLO, MISO, ACT0, ACT1  
701 Vs()hi  
702 Vs()lo  
703 Isc()hi  
704 Isc()lo  
Saturation Voltage hi  
Saturation Voltage lo  
Short-Circuit Current hi  
Short-Circuit Current lo  
Vs()hi = VDD - V(), I() = -4 mA  
I() = 4 mA  
450  
450  
mV  
mV  
mA  
mA  
V() = 0 . . . VDD  
-115  
V() = 0 . . . VDD  
100  
 复制成功!