iC-LNB 18-BIT OPTO ENCODER
WITH SPI AND SER/PAR INTERFACES
Rev A1, Page 6/35
PAD LAYOUT
PAD FUNCTIONS
No. Name Function
1 GND I/O Ports Ground
3310
2 VDD + 3 V ... +5.5 V I/O Ports Supply Voltage
3 SCK SPI Clock Input
4 MOSI SPI Data Input
DA4V
DA3V
DA4N
DA3N
5 MISO SPI Data Output
6 CS
SPI Chip Select Input
7 TNC Test Input NCOS /
Parallel Output Bit 15
DA2V
DA2N
8 TNS Test Input NSIN /
Parallel Output Bit 14
DA1VP DA1NP
200
DA1VN DA1NN
9 DIR
10 NSL
11 DIN
Code Inversion Input /
Parallel Output Bit 13
Shift Register Load Input (low active) /
Parallel Output Bit 12
Shift Register Data Input /
Parallel Output Bit 11
80
300
500
250
DPSIN
DPCOS
80
12 DOUT Shift Register Data Output /
Parallel Output Bit 10
5480
DNCOS
DNSIN
40
13 CLK
14 GA
15 GB
16 XJD
Shift Register Clock Input /
Parallel Output Bit 9
Gray-code Output A (MSB) /
Parallel Output Bit 8
Gray-code Output B (MSB-1) /
Parallel Output Bit 7
Adjustment Signal /
350
200
DA5V
DA5N
DA6N
DA7N
DA8N
DA9N
DA6V
DA7V
DA8V
DA9V
Parallel Output Bit 6
17 POK Power Ok Indication/
Parallel Output Bit 5
18 INCZ Incremental Output Z /
Parallel Output Bit 4
110
110
19 INCB Incremental Output B /
Parallel Output Bit 3
DA10V DA10N
20 INCA Incremental Output A /
Parallel Output Bit 2
1810
21 ERR Error Message Output
22 TPS
Test Input PSIN /
Parallel Output Bit 1
23 TPC Test Input PCOS /
Parallel Output Bit 0
24 NCOS Analog Voltage Output NCOS
25 PCOS Analog Voltage Output PCOS
26 NSIN Analog Voltage Output NSIN
27 PSIN Analog Voltage Output PSIN
28 LED
LED Highside Current Source
29 VDDA + 4 V ... +5.5 V Supply Voltage
30 GNDA Ground
Wiring unused input pads can be recommended, especially for pins DIR, TPS, TNS, TPC, TNC (e.g. via 10 kΩ
to GNDA).