iC-LNB 18-BIT OPTO ENCODER
WITH SPI AND SER/PAR INTERFACES
Rev A1, Page 12/35
ELECTRICAL CHARACTERISTICS
Operating conditions: VDDA = 4 V to 5.5 V, VDD = 3 V to 5.5 V, GNDA = GND, Tj = -40 °C to 125 °C, unless otherwise specified.
Item Symbol
No.
Parameter
Conditions
Unit
Min.
Typ.
Max.
Shift Register CLK, NSL, DOUT, DIN
B01
Vs()hi
Saturation Voltage hi at DOUT
Vs()hi = VDD - V();
400
mV
VDD = 3 . . . 4 V, I() = 1.5 mA
VDD = 4 . . . 5.5 V, I() = 2.5 mA
B02 Isc()hi
B03
Short-Circuit Current hi at DOUT
Saturation Voltage lo at DOUT
-100
1.5
-1.5
400
mA
mV
Vs()lo
VDD = 3 . . . 4 V, l() = 1.5 mA
VDD = 4 . . . 5.5 V, l() = 2.5 mA
B04 Isc()lo
B05 fin()
Short-Circuit Current lo at DOUT
100
16
mA
Permissible Clock Frequency at
CLK
MHz
B06 Vt()hi
B07 Vt()lo
B08 Vt()hys
Threshold Voltage hi at CLK,
NSL, DIN
2
V
V
Threshold Voltage lo at CLK,
NSL, DIN
0.8
40
Hysteresis at CLK, NSL, DIN
Pull-Up Current at CLK, NSL
Vt()hys = Vt()hi - Vt()lo
100
mV
B09
B10
B11
B12
Ipu()
Vpu()
Ipd()
Vpd()
V() = 0 . . . VDD - 1 V;
VDD = 3 . . . 4 V
VDD = 4 . . . 5.5 V
-65
-120
-25
-60
-5
-10
µA
µA
Pull-Up Voltage at CLK, NSL
Pull-Down Current at DIN
Pull-Down Voltage at DIN
Vpu() = VDD - V();
VDD = 3 . . . 4 V, I() = -3 µA
VDD = 4 . . . 5.5 V, I() = -5 µA
400
mV
V() = 1 V . . . VDD;
VDD = 3 . . . 4 V
VDD = 4 . . . 5.5 V
5
8
25
60
80
150
µA
µA
VDD = 3 . . . 4 V, I() = 3 µA
VDD = 4 . . . 5.5 V, I() = 5 µA
400
mV
B13 tp3()
B14 tp4()
Propagation Delay: DOUT Idle
State after Falling Edge NSL
see Figure 3
20
20
ns
Propagation Delay: DOUT stable see Figure 3
after Clock Edge CLK
ns
Parallel Outputs Bit 0 . . . 15 (parameter EPG = 0x1)
Pins: TNC, TNS, DIR, NSL, DIN, DOUT, CLK, GA, GB, XJD, POK, INCZ, INCB, INCA, TPS, TPC
C01
Vs()hi
Saturation Voltage hi
Vs()hi = VDD - V();
400
mV
VDD = 3 . . . 4 V, I() = 1.5 mA,
VDD = 4 . . . 5.5 V, I() = 2.5 mA
C02 Isc()hi
C03
Short-Circuit Current hi
Saturation Voltage lo
-100
1.5
-1.5
400
mA
mV
Vs()lo
VDD = 3 . . . 4 V, l() = 1.5 mA,
VDD = 4 . . . 5.5 V, l() = 2.5 mA
C04 Isc()lo
C05 tr()
Short-Circuit Current lo
Rise Time
100
30
mA
ns
CL = 30 pF, V(): 10% → 90% VDD
CL = 30 pF, V(): 90% → 10% VDD
C06 tf()
Fall Time
30
ns
Power-On-Reset POK
D01
Vs()hi
Saturation Voltage hi
Vs()hi = VDD - V();
400
mV
VDD = 3 . . . 4 V, I() = 1.5 mA,
VDD = 4 . . . 5.5 V, I() = 2.5 mA
D02 Isc()hi
D03
Short-Circuit Current hi
Saturation Voltage lo
-100
-1.5
400
mA
mV
Vs()lo
VDD = 3 . . . 4 V, l() = 1.5 mA,
VDD = 4 . . . 5.5 V, l() = 2.5 mA
D04 Isc()lo
Short-Circuit Current lo
1.5
3.6
100
4.0
mA
V
D05
VDDAon
Turn-on Threshold VDDA,
Power-on-release
increasing voltage at VDDA;
POK: lo → hi
decreasing voltage at VDDA;
EPG = 0, POK: hi → lo
VDDAhys = VDDAon - VDDAoff
3.8
3.5
0.3
D06
VDDAoff
Turn-off Threshold VDDA,
Power-down-reset
3.3
0.2
3.7
V
V
D07 VDDAhys Hysteresis
Code Inversion Input DIR
E01 Vt()hi
Threshold Voltage hi
2
V
ICHAUS [ IC-HAUS GMBH ]
