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IC-LFLCHIP 参数 Datasheet PDF下载

IC-LFLCHIP图片预览
型号: IC-LFLCHIP
PDF下载: 下载PDF文件 查看货源
内容描述: 256x1线性图像传感器 [256x1 LINEAR IMAGE SENSOR]
分类和应用: 传感器图像传感器
文件页数/大小: 8 页 / 246 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-LFL1402
256x1 LINEAR IMAGE SENSOR
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Rev A3, Page 2/8
DESCRIPTION
iC-LFL1402 is an integrating light-to-voltage con-
verter with a single line of 256 pixels pitched at
63.5 µm (center-to-center distance). Due to the
monolithical integration there is no pixel-gap or pitch
distortion whatsoever. Each pixel consists of a
56.4 µm x 200 µm photodiode, an integration capaci-
tor and a sample and hold circuit.
The integrated control logic makes operation very
simple, with only a start and clock signal necessary.
A third control input enables the integration period
to be prematurely terminated at any time (electronic
shutter).
When the start signal is given the hold mode is acti-
vated for all pixels simultaneously with the next rising
clock edge; starting with pixel 1 the hold voltages are
switched in sequence to the push-pull output ampli-
fier. The second clock pulse deletes all integration
capacitors and the integration period starts again in
the background during the output phase. A run is
complete after 256 clock pulses.
iC-LFL1402 is suitable for high clock rates of up to
5 MHz. If this is not required the supply current can
be reduced via the external bias setting.
PACKAGES
OBGA LFL1C
PIN CONFIGURATION OBGA LFL1C
(top view)
PIN FUNCTIONS
No. Name Function
1
2
3
4
5
Start Integration Input
Clock Input
Analogue Output
+5 V Supply Voltage
Bias Current (resistor from VCC to
RSET; when connected to GND the in-
ternal bias setting is activated)
6 AGND Analogue Ground
7 GND Digital Ground
8 DIS
Disable Integration Input
SI
CLK
AO
VCC
RSET
CHIP-LAYOUT
iC-LFL1402
Chip size: 16.6 mm x 1.7 mm
DIS
GND
Pitch 63.5 um
Active Area 56.4 um x 200 um
AGND
TP RSET
PIXEL 1
PIXEL 256
SI
CLK
AO
VDD VCC