iC-LFH Series
HIGH-RESOLUTION LINEAR IMAGE SENSORS
Rev B1, Page 12/14
INTEGRATION CONTROL
The integration is controlled by the signals:
• Pin SI
• Pin CLK
• Pin ESH
cle is initiated. With pin ESH = lo all photodiodes are
connected to the internal capacitors and the photodi-
ode currents are integrated. The integration can be
suspended by setting pin ESH to hi, disconnecting the
photodiodes from their integration capacitors.
A new integration phase is started with a rising CLK
edge and SI high. After 9 clocks a new integration cy-
PINS
SI
CLK
ESH
VMIN
1
2
N-1
N
VMIN
AO
INTERNAL
1
1
1
2
2
2
3
3
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
N+15 N+16
1
2
CLK NR
STATE
INT
INT
INT
RESET
INT
Figure 11: Integration cycle
PINS
SI
CLK
ESH
VMIN
1
2
N-1
N
VMIN
AO
INTERNAL
CLK NR
STATE
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
N+15 N+16
1
2
RESET
INT
Figure 12: Integration cycle with shutter action
PINS
SI
CLK
ESH
VMIN
1
2
VMIN
AO
INTERNAL
CLK NR
STATE
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
RESET
INT
Figure 13: Integration cycle with shutter action and readout interrupt
ICHAUS [ IC-HAUS GMBH ]
