IBMN625404GT3B
IBMN625804GT3B
Preliminary
256Mb Double Data Rate Synchronous DRAM
Electrical Characteristics & AC Timing for DDR266B - Applicable Specifications
Expressed in Clock Cycles (0 °C ≤ TA ≤ 70 °C; VDDQ = 2.5V ± 0.2V; VDD = 2.5V ± 0.2V, See AC
Characteristics)
DDR266B @ CL = 2.5
Symbol
Parameter
Mode register set command cycle time
Units
Notes
Min
2
Max
t
t
t
t
t
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
MRD
CK
CK
CK
CK
t
Write preamble
0.25
6
WPRE
t
Active to Precharge command
Active to Active/Auto-refresh command period
16000
RAS
t
9
RC
Auto-refresh to Active/Auto-refresh
command period
t
10
t
1, 2, 3, 4
RFC
RCD
CK
t
Active to Read or Write delay
3
3
3
2
2
t
t
t
t
t
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
CK
CK
CK
CK
CK
t
Active to Read Command with Autoprecharge
Precharge command period
RAP
t
RP
t
Active bank A to Active bank B command
Write recovery time
RRD
t
WR
DAL
WTR
1, 2, 3, 4,
5
t
Auto precharge write recovery + precharge time
5
t
CK
t
Internal write to read command delay
Exit self-refresh to non-read command
Exit self-refresh to read command
1
t
t
t
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
CK
CK
CK
t
10
XSNR
XSRD
t
200
1. Input slew rate = 1V/ns.
2. The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross: the input reference level for
signals other than CK/CK, is V
REF.
3. Inputs are not recognized as valid until V
stabilizes.
REF
4. The Output timing reference level, as measured at the timing reference point indicated in AC Characteristics (Note 3) is V
.
TT
5. t and t transitions occur in the same access time windows as valid data transitions. These parameters are not referred to a
HZ
LZ
specific voltage level, but specify when the device is no longer driving (HZ), or begins driving (LZ).
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
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