IBMN612404GT3B
IBMN612804GT3B
Preliminary
128Mb Double Data Rate Synchronous DRAM
Truth Table 3: Current State Bank n - Command to Bank n (Same Bank)
Current State
Any
CS
H
L
RAS CAS
WE
X
H
H
H
L
Command
Deselect
Action
Notes
1-6
X
H
L
X
H
H
L
NOP. Continue previous operation
NOP. Continue previous operation
Select and activate row
No Operation
Active
1-6
L
1-6
1-7
Idle
L
L
Auto Refresh
Mode Register Set
Read
L
L
L
1-7
L
H
H
L
L
H
L
Select column and start Read burst
Select column and start Write burst
Deactivate row in bank(s)
1-6, 10
1-6, 10
1-6, 8
Row Active
L
L
Write
L
H
L
L
Precharge
Read
L
H
L
H
L
Select column and start new Read burst
Truncate Read burst, start Precharge
Burst Terminate
1-6, 10
1-6, 8
Read
(Auto Precharge
Disabled)
L
H
H
L
Precharge
Burst Terminate
Read
L
H
H
H
L
L
1-6, 9
L
H
L
Select column and start Read burst
Select column and start Write burst
Truncate Write burst, start Precharge
1-6, 10, 11
1-6, 10
1-6, 8, 11
Write
(Auto Precharge
Disabled)
L
L
Write
L
H
L
Precharge
1. This table applies when CKE n-1 was high and CKE n is high (see Truth Table 2: Clock Enable (CKE) and after t
t
has
XSNR / XSRD
been met (if the previous state was self refresh).
2. This table is bank-specific, except where noted, i.e., the current state is for a specific bank and the commands shown are those
allowed to be issued to that bank when in that state. Exceptions are covered in the notes below.
3. Current state definitions:
Idle:
The bank has been precharged, and t has been met.
RP
Row Active:
A row in the bank has been activated, and t has been met. No data bursts/accesses and no register
RCD
accesses are in progress.
Read:
Write:
A Read burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
A Write burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
4. The following states must not be interrupted by a command issued to the same bank.
Precharging:
Starts with registration of a Precharge command and ends when t is met. Once t is met, the bank is in the
RP
RP
idle state.
Row Activating: Starts with registration of an Active command and ends when t
“row active” state.
is met. Once t
is met, the bank is in the
RCD
RCD
Read w/Auto Precharge Enabled: Starts with registration of a Read command with Auto Precharge enabled and ends when t
RP
RP
has been met. Once t is met, the bank is in the idle state.
Write w/Auto Precharge Enabled: Starts with registration of a Write command with Auto Precharge enabled and ends when t
RP
has been met. Once t is met, the bank is in the idle state.
RP
Deselect or NOP commands, or allowable commands to the other bank should be issued on any clock edge occurring during these
states. Allowable commands to the other bank are determined by its current state and according to Truth Table 4.
5. The following states must not be interrupted by any executable command; Deselect or NOP commands must be applied on each
positive clock edge during these states.
Refreshing:
Starts with registration of an Auto Refresh command and ends when t
SDRAM is in the “all banks idle” state.
is met. Once t
is met, the DDR
RFC
RFC
Accessing Mode Register: Starts with registration of a Mode Register Set command and ends when t
has been met. Once
MRD
t
is met, the DDR SDRAM is in the “all banks idle” state.
MRD
Precharging All: Starts with registration of a Precharge All command and ends when t is met. Once t is met, all banks is in
RP
RP
the idle state.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle.
8. May or may not be bank-specific; if all/any banks are to be precharged, all/any must be in a valid state for precharging.
9. Not bank-specific; Burst terminate affects the most recent Read burst, regardless of bank.
10. Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads or Writes
with Auto Precharge disabled.
11. Requires appropriate DM masking.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
06K0566.F39350B
1/01
Page 47 of 79