IBM PowerPRS Q-64G
Preliminary
Packet Routing Switch
3.3.7 Egress Idle Packet Format
The egress idle packet format for the PowerPRS Q-64G 16-Gbps configuration is presented in Figure 3-5.
Bytes 0:2 and bytes 5:6 of the master LU carry control information, as described in Tables 3-10 through 3-19.
Figure 3-5. Egress Idle Packet Format
High Channel Packet
Byte 0
H0
Byte 1
H1
Byte 2
Byte 3
Byte 4
D21.5
Byte 5
SCC
Byte 6
FC
Byte 7
K28.1
Byte 8
D21.5
Byte 9
D21.5
H2/D21.5 D21.5
Master LU
D21.5
D21.5
D21.5
D21.5
D21.5
D21.5
D21.5
K28.1
D21.5
D21.5
7 Slave LUs
Low Channel Packet
Byte 0
H0
Byte 1
H1
Byte 2 Byte 3
Byte 4
D21.5
Byte 5
SCC
Byte 6
FC
Byte 7
K28.5
Byte 8
D21.5
Byte 9
D21.5
H2/D21.5 D21.5
Master LU
7 Slave LUs
Notes:
D21.5
D21.5
D21.5
D21.5
D21.5
D21.5
D21.5
K28.5
D21.5
D21.5
1. H0, H1, and H2 are packet header bytes. H2 exists only in the 512-Gbps configuration.
2. D21.5, K28.1, and K28.5 characters are 8b/10b control characters. K28.1 and K28.5 characters are used for link
synchronization (byte alignment and packet clock recovery) and supervision (byte alignment and synchronization
lost). D21.5 characters guarantee continuous transition on the line.
3. SCC is side communication channel data. Bits 4:7 are copies of bits 0:3.
4. FC is flow control information in addition to that transmitted in the packet header.
Table 3-10. Egress Idle Packet, Byte H0
Information Carried
Bits 2:3
Byte
Bit 0
Bit 1
Bits 4:5
Color
Bits 6:7
H0
Grant type
Parity
Protection
Protection
Reserved
(high channel)
Extended output
queue grant
flywheel status
Output queue grant
priority flywheel
status
H0
Parity
Color
(low channel)
prsq-64g.01.fm
December 20, 2001
Functional Description
Page 39 of 199
IBM [ IBM ]
