IBM3009K2672
IBM SONET/SDH Framer
9.11: ACITXGP [3860 H]
Static configuration data, providing control signals for chiplets ACI_Tx1 and ACI_Tx2. This register is set
once by the GPP before the individual chiplets are enabled and is not changed during normal operation.
Signal Name
Bits
Access
Default
Description
Configuration of the ATM Cell interface, transmit direction:
000: all ATM cell interfaces disabled. This mode is not valid for PPP
operation.
001: UTOPIA interface 1 active only (1 x UTOPIA Level 1, 1 x 8-bit
mode), non-STM-4c. This mode is not valid for PPP operation.
010: UTOPIA interface 2 active only (1 x UTOPIA Level 1, 1 x 8-bit
mode), non-STM-4c. This mode is not valid for PPP operation.
011: UTOPIA interface 1 and 2 active (2 x UTOPIA Level 1, 2 x 8-bit
mode), non-STM-4c. This mode is not valid for PPP operation.
L1L2Tx(2:0)
2:0
R/W
110
100: all ATM cell interfaces disabled.
101: UTOPIA interface 1 active only (1 x UTOPIA Level 2, 1 x 8-bit
mode), non-STM-4c. This mode is not valid for PPP operation.
110: UTOPIA interface 1 active only (1 x UTOPIA Level 2, 1 x 16-bit
mode), non-STM-4c. This mode is valid for PPP operation.
111: UTOPIA interface 1 active only (1 x UTOPIA Level 2, 1 x 16-bit
mode), STM-4c. This mode is valid for PPP operation.
Type of status indication for UTOPIA interface 1 (Level 2 only). 10 is the
only valid setting when processing PPP data.
00: Direct status indication, one status line only (TxClav[0]).
(TxClav[1:3] always high impedance).
01: Direct status indication, four status lines (TxClav[0:3]).
10: Multiplexed status indication, one status line only (TxClav[0]).
(TxClav[1:3] always high impedance).
11: Multiplexed status indication, four status lines (TxClav[0:3]).
SIndT1(1:0)
Reserved
4:3
7:5
R/W
R/W
10
000
Reserved
Register Descriptions
Page 136 of 279
ssframer.01
8/27/99
IBM [ IBM ]
