IBM3009K2672
IBM SONET/SDH Framer
9.7: GLoopRx [385D H]
Receive loopback control. Cells/frames that are received by the SFH blocks are looped back towards the
transmit line. Refer to Loopback Capabilities on page 131.
For bit positions 3 to 0: 0: ACH Loopback #2 disabled (DEFAULT)
1: ACH Loopback #2 enabled
For bit positions 7 to 4: 0: On-the-fly monitoring (LpB #2)
1: Loopback #2 only
Signal Name
Bits
Access
Default
Description
Loopback #2 control, receive macro #1
RxLpB21
RxLpB22
0
1
2
3
4
5
6
7
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Loopback #2 control, receive macro #2
Loopback #2 control, receive macro #3
Loopback #2 control, receive macro #4
Loopback #2 only, receive macro #1
Loopback #2 only, receive macro #2
Loopback #2 only, receive macro #3
Loopback #2 only, receive macro #4
RxLpB23
RxLpB24
RxLpB21only
RxLpB22only
RxLpB23only
RxLpB24only
9.8: GExtRes [385E H]
External clock recovery circuit reset signal. Delivered to external circuit (deserializer) via device pin. The
active level depends on the external circuit used. Default value at power-on reset is low.
Signal Name
RSTCRec1
Reserved
Bits
0
Access
R/W
Default
0
Description
External clock recovery circuit reset. The state of this bit is driven out onto
the RSTCREC1 pin.
7:1
R/W
0000000 Reserved
Register Descriptions
Page 134 of 279
ssframer.01
8/27/99
IBM [ IBM ]
