Data Sheet
Preliminary
PowerPC 970FX
About This Datasheet .................................................................................................... 9
1. General Information .................................................................................................. 11
1.1 Description .................................................................................................................................... 11
1.2 Features ......................................................................................................................................... 11
1.3 PowerPC 970FX Block Diagram ................................................................................................... 13
1.4 Ordering and Processor Version Register ................................................................................. 14
1.4.1 Leaded Package Version ...................................................................................................... 14
1.4.2 Reduced-Lead Package Version ........................................................................................... 14
2. General Parameters .................................................................................................. 17
3. Electrical and Thermal Characteristics ................................................................... 17
3.1 DC Electrical Characteristics ....................................................................................................... 17
3.1.1 Absolute Maximum Ratings ................................................................................................... 17
3.1.2 Recommended Operating Conditions ................................................................................... 18
3.1.3 Package Thermal Characteristics .......................................................................................... 18
3.1.4 DC Electrical Specifications ................................................................................................... 18
3.1.5 Power Consumption .............................................................................................................. 20
3.2 AC Electrical Characteristics ....................................................................................................... 22
3.3 Clock AC Specifications ............................................................................................................... 23
3.4 Processor-Clock Timing Relationship Between PSYNC and SYSCLK .................................... 24
3.5 Processor Interconnect Specifications ....................................................................................... 26
3.5.1 Electrical and Physical Specifications ................................................................................... 26
3.5.1.1 Source Synchronous Bus (SSB) .................................................................................... 26
3.5.1.2 Drive Side Characteristics .............................................................................................. 26
3.5.1.3 Module-to-Module Interconnect Characteristics ............................................................. 27
3.5.1.4 Receive Side Characteristics ......................................................................................... 28
3.6 Input AC Specifications ................................................................................................................ 30
3.6.1 TBEN Input Pin ...................................................................................................................... 31
3.7 Asynchronous Output Specifications ......................................................................................... 32
3.8 Mode Select Input Timing Specifications ................................................................................... 33
3.9 Spread Spectrum Clock Generator (SSCG) ................................................................................ 36
3.9.1 Design Considerations .......................................................................................................... 36
3.10 I2C and JTAG ............................................................................................................................... 37
3.10.1 I2C Bus Timing Information ................................................................................................. 37
3.10.2 IEEE 1149.1 AC Timing Specifications ............................................................................... 37
3.10.3 I2C and JTAG Considerations ............................................................................................. 39
3.10.4 Boundary Scan Considerations ........................................................................................... 39
4. PowerPC 970FX Microprocessor Dimension and Physical Signal Assignments 40
4.1 ESD Considerations ...................................................................................................................... 40
4.2 Mechanical Packaging .................................................................................................................. 40
4.2.1 Leaded Package Version ...................................................................................................... 40
4.2.2 Reduced-Lead Package Version ........................................................................................... 44
4.2.2.1 Mechanical Specifications .............................................................................................. 44
4.2.2.2 Assembly Considerations ............................................................................................... 44
October 14, 2005
Page 3 of 74
IBM [ IBM ]
