.
Data Sheet
Preliminary
PowerPC 970FX
1. General Information
1.1 Description
The IBM PowerPC 970FX RISC Microprocessor, is a 64-bit implementation of the IBM PowerPC® family of
reduced instruction set computer (RISC) microprocessors that are based on the PowerPC Architecture. This
microprocessor, also called the PowerPC 970FX, includes a Vector/SIMD facility which supports high-
bandwidth data processing and algorithmic-intensive computations. This microprocessor is also designed to
support multiple system organizations, including desktop and low-end server applications, and uniprocessor
up through four-way SMP configurations.
Note: The terms microprocessor and processor are used interchangeably in this document.
Figure 1-1 on page 13 is a block diagram of the PowerPC 970FX.
The PowerPC 970FX consists of three main components:
• PowerPC 970FX Core which includes VMX execution units
• PowerPC 970FX Storage subsystem which includes core interface logic, non-cacheable unit, L2 cache
and controls, and the Bus Interface Unit
• PowerPC 970FX Pervasive Functions
This document also provides pertinent physical characteristics of the PowerPC 970FX single chip modules
(SCM).
1.2 Features
• 64-bit implementation of the PowerPC Architecture (Version 2.01)
• Binary compatibility for all PowerPC application level code (problem state)
• Binary compatibility for all PowerPC application level code (problem state)
• Support for 32-bit O/S bridge facility
• Vector/SIMD Multimedia eXtension
• Layered implementation strategy for very high frequency operation
• Deeply pipelined design
- 16 stages for most fixed-point register-register operations
- 18 stages for most load and store operations (assuming L1 Dcache hit)
- 21 stages for most floating point operations
- 19, 22, and 25 stages for fixed-point, complex-fixed, and floating point operations, respectively in
the VALU.
- 19 stages for VMX permute operations
General Information
October 14, 2005
Page 11 of 74
IBM [ IBM ]
