Datasheet
PowerPC 970FX RISC Microprocessor
Contents
List of Figures ................................................................................................................. 5
List of Tables ................................................................................................................... 7
Revision Log ................................................................................................................... 9
About This Datasheet ................................................................................................... 11
1. General Information .................................................................................................. 13
1.1 Description .................................................................................................................................... 13
1.2 Features ......................................................................................................................................... 13
1.3 PowerPC 970FX RISC Microprocessor Block Diagram ............................................................. 15
1.4 Ordering and Processor Version Register ................................................................................. 16
1.4.1 Standard Lead Package Version ........................................................................................... 16
1.4.2 Reduced-Lead Package Version ........................................................................................... 17
2. General Parameters .................................................................................................. 19
3. Electrical and Thermal Characteristics ................................................................... 21
3.1 dc Electrical Characteristics ........................................................................................................ 21
3.1.1 Absolute Maximum Ratings ................................................................................................... 21
3.1.2 Recommended Operating Conditions ................................................................................... 21
3.1.3 Package Thermal Characteristics .......................................................................................... 22
3.1.4 dc Electrical Specifications .................................................................................................... 23
3.1.5 Power Consumption .............................................................................................................. 24
3.2 ac Electrical Characteristics ........................................................................................................ 26
3.3 Clock ac Specifications ................................................................................................................ 26
3.4 Processor-Clock Timing Relationship between PSYNC and SYSCLK .................................... 28
3.5 Processor Interconnect Specifications ....................................................................................... 30
3.5.1 Electrical and Physical Specifications ................................................................................... 30
3.5.1.1 Source Synchronous Bus ............................................................................................... 30
3.5.1.2 Drive Side Characteristics .............................................................................................. 30
3.5.1.3 Module-to-Module Interconnect Characteristics ............................................................. 31
3.5.1.4 Receive Side Characteristics ......................................................................................... 32
3.6 Input ac Specifications ................................................................................................................. 34
3.6.1 TBEN Input Pin ...................................................................................................................... 35
3.7 Asynchronous Output Specifications ......................................................................................... 36
3.8 Mode Select Input Timing Specifications ................................................................................... 37
3.9 Spread Spectrum Clock Generator ............................................................................................. 40
3.9.1 Design Considerations .......................................................................................................... 40
3.10 I2C and JTAG ............................................................................................................................... 41
3.10.1 I2C Bus Timing Information ................................................................................................. 41
3.10.2 IEEE 1149.1 ac Timing Specifications ................................................................................. 41
3.10.3 I2C and JTAG Considerations ............................................................................................. 43
3.10.4 Boundary Scan Considerations ........................................................................................... 43
Version 2.5
Contents
March 26, 2007
Page 3 of 78
IBM [ IBM ]
