PowerPC 740 and PowerPC 750 Microprocessor
CMOS 0.20
µ
m Copper Technology, PID-8p, PPC740L and PPC750L, dd3.2
• Integrated power management
- Low-power 2.0/3.3V design.
- Three static power saving modes: doze, nap, and sleep.
- Automatic dynamic power reduction when internal functional units are idle.
• Integrated Thermal Management Assist Unit
- On-chip thermal sensor and control logic.
- Thermal Management Interrupts for software regulation of junction temperature.
• Testability
- JTAG interface.
General Parameters
The following list provides a summary of the general parameters of the 750.
Technology
0.20µm CMOS (general lithography), six-layer copper metallization
0.12
±
0.04µm L
eff
Die Size
Transistor count
Logic design
Package
5.14mm x 7.78mm (40mm
2
)
6.35 million
Fully-static
740: Surface mount 21x21mm, 255-lead ceramic ball grid array (CBGA)
750: Surface mount 25x25mm, 360-lead ceramic ball grid array (CBGA)
PPC 740/PPC 750 core
power supply
I/O power supply
2V Nominal (see Application Conditions)
3.3V 2.5V, or 1.8V (Nominal Selectable)
Page 9
Version 2.0
9/6/2002
IBM [ IBM ]
