PowerPC 740 and PowerPC 750 Microprocessor
CMOS 0.20 µm Copper Technology, PID-8p, PPC740L and PPC750L, dd3.2
Power Consumption for 740 and 750
See Table “Recommended Operating Conditions,” on page 11, for operating conditions
Actual Processor CPU Frequency
Unit
Notes
300
333
350
366
375
400
433
466
500A
500C
533D
Full-On Mode
Typical
3.7
4.5
4.0
5.0
4.1
5.2
4.3
5.5
4.4
5.7
4.5
6.0
5.0
6.3
5.5
6.8
6.0
7.5
6.3
7.8
6.75
8.25
W
W
1, 3, 4
1, 2, 4
Maximum
Doze Mode
Maximum
Nap Mode
Maximum
Sleep Mode
Maximum
Note:
1.7
250
n/s
1.7
250
n/s
1.7
250
n/s
1.8
250
n/s
1.8
250
n/s
1.9
250
n/s
2.1
250
n/s
2.2
250
n/s
2.5
250
350
3.3
800
500
3.3
800
500
W
1, 2, 4
1, 4
mW
mW
1, 4
1. These values apply for all valid 60x bus and L2 bus ratios. The values do not include I/O Supply Power (OVDD and L2OVDD) or PLL/DLL supply power
(AVDD and L2AVDD). OVDD and L2OVDD power is system dependent, but is typically less than 10% of VDD power. Worst case power consumption for
AVDD = 15mW and L2AVDD = 15mW.
2. Maximum power is shown for a system executing worst case benchmark sequences at:
•
•
•
•
VDD = AVDD = L2AVDD = 2.1V (300 through 466, 500A, 500C)
VDD = AVDD = L2AVDD = 2.15V (533D)
OVDD = L2OVDD = 3.3V
Tj = 65°C
Maximum power at 85°C can be derived by adding 0.1 W to the maximum power shown at 65°C. Maximum power at 105°C can be derived by
adding 0.3 W to the maximum power shown at 65°C.
3. Typical power is an average value shown for a system executing typical applications and benchmark sequences at:
•
•
•
•
•
VDD = AVDD = L2AVDD = 2.0V (300 through 400)
VDD = AVDD = L2AVDD = 2.05V (433 through 466, 500A, 500C)
VDD = AVDD = L2AVDD = 2.1V (533D)
OVDD = L2OVDD = 3.3V
Tj = 45°C.
4. Guaranteed by design and characterization, and is not tested.
5. 500A column describes operation of the 500A part at 500MHz.
500C column describes operation of the 500C part at 500MHz.
533D column describes operation of the 533D part at 533MHz.
Page 13
Version 2.0
9/6/2002
IBM [ IBM ]
