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IBM25PPC750FL-GR0133T 参数 Datasheet PDF下载

IBM25PPC750FL-GR0133T图片预览
型号: IBM25PPC750FL-GR0133T
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 600MHz, CMOS, CBGA292, 21 X 21 MM, 1 MM PITCH, ROHS COMPLIANT, CERAMIC, BGA-292]
分类和应用: 时钟外围集成电路
文件页数/大小: 66 页 / 1860 K
品牌: IBM [ IBM ]
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Preliminary  
PowerPC 750FL RISC Microprocessor  
Table 3-5. Power Consumption (Low Power) 4  
Representative Processor Frequency3  
Mode  
VDD  
Tj  
Unit  
Notes  
600 MHz  
700 MHz  
733 MHz  
Full-On Mode  
Maximum  
Typical  
1.45 V 105°C  
1.45 V 85°C  
5.0  
4.6  
5.5  
5.0  
5.7  
5.1  
W
W
1, 2  
1, 3  
Nap Mode  
Sleep Mode  
Notes:  
Maximum  
Typical  
1.45 V  
1.45 V  
65°C  
50°C  
0.65  
0.4  
0.7  
0.4  
0.7  
0.4  
W
W
1
1
1. These values apply for all valid 60x buses. The values do not include I/O supply power (OVDD) or PLL/DLL supply power  
(AVDD). OVDD power is system dependent, but is typically < 2% of VDD power. AVDD current is less than 25 mA for each  
of AVDD1 and AVDD2  
.
2. Maximum power is specified for the fastest (worst process) parts running RC5 at the indicated core voltage, junction tem-  
perature, and core frequency.  
3. Typical power is specified for the median process parts running RC5 at the indicated core voltage, junction temperature,  
and core frequency. The value is then adjusted for 13% less switching (ac component for power dissipation (PD) to  
account for the differences between RC5 and more typical application code).  
4. See Table 3-2 Recommended Operating Conditions on page 17 for the recommended operating conditions.  
Table 3-6. Power Consumption (Standard Power) 4  
Representative Processor Frequency3  
Mode  
VDD  
Tj  
Unit  
Notes  
600 MHz  
700 MHz  
733 MHz  
Full-On Mode  
Maximum  
1.45 V  
1.45 V  
105°C  
85°C  
7.9  
4.6  
8.2  
5.0  
8.3  
5.1  
W
W
1, 2  
1, 3  
Typical  
Nap Mode  
Typical  
Typical  
1.45 V  
1.45 V  
50°C  
50°C  
1.5  
1.4  
1.6  
1.4  
1.6  
1.4  
W
W
1
1
Sleep Mode  
Notes:  
1. These values apply for all valid 60x buses. The values do not include I/O supply power (OVDD) or PLL/DLL supply power  
(AVDD). OVDD power is system dependent, but is typically < 2% of VDD power. AVDD current is less than 25 mA for each  
of AVDD1 and AVDD2  
.
2. Maximum power is specified for the fastest (worst process) parts running RC5 at the indicated core voltage, junction tem-  
perature, and core frequency.  
3. Typical power is specified for the median process parts running RC5 at the indicated core voltage, junction temperature,  
and core frequency. The value is then adjusted for 13% less switching (ac component for PD to account for the differences  
between RC5 and more typical application code).  
4. See Table 3-2 Recommended Operating Conditions on page 17 for the recommended the operating conditions.  
750flds60.fm.6.0  
April 27, 2007  
Electrical and Thermal Characteristics  
Page 19 of 65