Preliminary
PowerPC 405EP Embedded Processor Data Sheet
Initialization
The following describes the method by which initial chip settings are established when a system reset occurs.
Strapping
When the SysReset input is driven low (system reset), the state of certain I/O pins is read to enable default
initial conditions prior to PPC405EP start-up. The actual capture instant is the nearest system clock edge
before the deassertion of reset. These pins must be strapped using external pull-up (logical 1) or pull-down
(logical 0) resistors to select the desired default conditions. The recommended pull-up is 3kΩ to +3.3V or
10kΩ to +5V. The recommended pull-down is 1KΩ to GND. These pins are use for strap functions only
during reset. They are used for other signals during normal operation. The following table lists the strapping
pins along with their functions and strapping options. The signal names assigned to the pins for normal
operation appear below the pin number.
Strapping Pin Assignments
Function
Option
Ball Strapping
P04
IIC EEPROM controller
UART0_Tx
If the controller is enabled, 32 bytes of configuration
data are read from the EEPROM.
Disable
Enable
0
1
EEPROM address (P04 = 1)
or
Boot ROM width (P04 = 0)
N02
UART0_RTS
Y17
SysErr
When P04 = 1, these pins set the high-order two bits of
the EEPROM base address.
High order EEPROM base address bits
Address bit
Address bit
When P04 = 0, these pins indicated the width of the
boot ROM.
8
bits0
bits0
1
0
1
0
1
16
reserved
reserved
1
EEPROM
During reset, configuration values other than the internal default values can be read from a serial EEPROM
connected to the IIC port. The association of bits in the EEPROM with the configuration values and their
default values are covered in detail in the PowerPC 405EP Embedded Processor User’s Manual.
Caution: If P04 is strapped to 1, and the EEPROM is not connected or is defective, the PPC405EP remains
in the reset state and will not boot.
Revision Log
Date
Contents of Modification
01/30/2003
03/18/2003
05/13/2003
06/09/2003
Add revision log.
Update revision level of chip.
Add 333MHZ part numbers.
Add new supply voltage specs for 333MHz.
Page 50 of 52
6/9/03
IBM [ IBM ]
