PowerPC 405CR Embedded Controller Data Sheet
I/O Specifications—200MHz
Notes:
1. The two-cycle SDRAM command interface is driven in cycle 1 and used in cycle 2. Output times in table are in cycle 1.
2. SDRAM output timing is relative to the rising edge of the internal PLB clock, which is an integral multiple of and rising-
edge aligned with SysClk. Therefore, SDRAM output timings in the table are shown relative to SysClk. Timings shown
are for a lumped 50pF load, however the interface has been verified for PC100-compliant operation using transmission
line circuit analysis.
3. SDRAM CLK0:1 rising edge at package pin precedes the internal PLB clock by approximately 0.5ns for a typical clock
network or a lumped 10pF load.
4. PerClk rising edge at package pin with a 10pF load trails the internal PLB clock by approximately 0.8ns.
Input (ns)
Output (ns)
Valid Delay Hold Time
(maximum) (minimum)
Output Current (mA)
Signal
Clock
Notes
Setup Time Hold Time
(minimum) (minimum)
I/O H I/O L
(maximum) (minimum)
50pF load
50pF load
SDRAM Interface
BA0:1
n/a
n/a
n/a
n/a
n/a
n/a
2
n/a
n/a
n/a
n/a
n/a
n/a
1
7.3
5.8
7.3
4.7
6.2
6
1
1
1
1
1
1
1
1
-1
1
1
1
19
19
19
40
19
19
19
19
19
19
19
19
12
12
12
25
12
12
12
12
12
12
12
12
SysClk
SysClk
SysClk
SysClk
SysClk
SysClk
SysClk
SysClk
SysClk
SysClk
SysClk
SysClk
1, 2
2
BankSel0:3
CAS
1, 2
2
ClkEn0:1
DQM0:3
2
DQMCB
2
ECC0:7
6
2
MemAddr12:0
MemClkOut0:1
MemData0:31
RAS
n/a
n/a
2
n/a
n/a
1
7.8
0
1, 2
2, 3
2
6.2
7.4
7.4
n/a
n/a
n/a
n/a
1, 2
1, 2
WE
External SLAVE Peripheral Interface
DMAAck0:3
DMAReq0:3
EOT0:3[TC0:3]
PerAddr0:31
PerBLast
n/a
dc
dc
4
n/a
dc
dc
1
8
n/a
9
0
n/a
0
12
n/a
12
19
12
8
n/a
8
PerClk
PerClk
PerClk
PerClk
PerClk
10
8
0
12
8
4
1
0
PerCS0
PerCS1:7[GPIO10:16]
n/a
n/a
9
0
12
8
PerClk
PerData0:31
PerOE
6
n/a
4
1
n/a
1
10
8
0
0
19
12
19
12
n/a
12
12
8
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerPar0:3
PerR/W
10.5
8
0
12
8
5
1
0
PerReady
PerWBE0:3
9
1
n/a
8
n/a
0
n/a
8
4
1
External MASTER Peripheral Interface
BusReq
ExtAck
ExtReq
ExtReset
HoldAck
HoldPri
HoldReq
PerClk
n/a
n/a
6
n/a
n/a
1
8
8
0
0
12
12
8
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PLB Clk
PerClk
8
n/a
8
n/a
0
n/a
19
n/a
12
8
n/a
n/a
4
n/a
n/a
1
8
0
12
n/a
n/a
0.9
n/a
n/a
n/a
0.9
n/a
n/a
n/a
19
n/a
n/a
12
n/a
6
1
n/a
4
n/a
1
4
PerErr
n/a
37
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